Rose Thompson
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ceb31fec68
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-05-10 08:54:23 -05:00 |
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Rose Thompson
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b027fa44ef
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-05-10 08:53:00 -05:00 |
|
Rose Thompson
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4bd5d334df
|
Modified testbench so it instantiates the function logger if DEBUG is greater than 0 rather than just 1.
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2024-05-10 08:51:59 -05:00 |
|
David Harris
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66b33c09be
|
Added Zaamo and Zalrsc support to testbench and regression
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2024-05-10 05:41:00 -07:00 |
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David Harris
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54750ae4d5
|
Fixed out-of-bound vector accesses in testbench_fp when FLEN < Q_LEN
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2024-05-09 19:52:37 -07:00 |
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David Harris
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bdd0043cd1
|
Testbench terminates buildroot sim at instruction limit
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2024-05-09 07:58:53 -07:00 |
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David Harris
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47af54b131
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Fixed buildroot prematurely terminating in VCS
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2024-05-09 07:29:45 -07:00 |
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David Harris
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0d1d59a3d8
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-05-08 18:58:01 -07:00 |
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Divya2030
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31ae18922b
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regression_wally vcs run works
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2024-05-08 04:25:03 -07:00 |
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David Harris
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77137f0f60
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ZAAMO and ZALRSC implemented but not tested
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2024-05-07 16:45:49 -07:00 |
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Divya2030
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a3f1a274d2
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VCS Simulation Passed
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2024-05-07 10:41:02 -07:00 |
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David Harris
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06d3591a15
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Divy's change for VCS signature checking
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2024-05-04 02:45:43 -07:00 |
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Divya2030
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12a9c0ebd6
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pmp coverage
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2024-05-02 11:53:32 -07:00 |
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Divya2030
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ee566aa856
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pmp coverage
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2024-05-02 11:53:04 -07:00 |
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Divya2030
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7a5eac963e
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Revert "pmp functional coverage basic"
This reverts commit db2b07b05d.
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2024-05-02 11:43:33 -07:00 |
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Divya2030
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3853f94337
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Revert "initial commit pmp basic coverage working"
This reverts commit 7ca1c976c0.
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2024-05-02 11:23:59 -07:00 |
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Divya2030
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9f27f3fe28
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Merge branch 'main' of github.com:Divya2030/cvw
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2024-05-02 11:21:05 -07:00 |
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Divya2030
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db2b07b05d
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pmp functional coverage basic
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2024-05-02 11:20:03 -07:00 |
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Divya2030
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694c69c651
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Merge branch 'openhwgroup:main' into main
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2024-05-02 10:34:15 -07:00 |
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Divya2030
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7ca1c976c0
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initial commit pmp basic coverage working
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2024-05-02 10:33:29 -07:00 |
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David Harris
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e667adf946
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Added covergen directed coverage generator
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2024-05-01 14:47:37 -07:00 |
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David Harris
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9b22275438
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Removed unused signals from WallyTracer
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2024-04-30 08:54:28 -07:00 |
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David Harris
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fc7c183d56
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Added fcvtmod.w.d_b22 to regression now that it works in Sail
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2024-04-29 17:52:21 -07:00 |
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David Harris
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160c11d786
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Integrating riscv-dv coverage
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2024-04-24 10:17:49 -07:00 |
|
David Harris
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6415bfc3c2
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Code and testbench cleanup
|
2024-04-23 10:17:44 -07:00 |
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David Harris
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f9eec8c43f
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Merged wsim changes
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2024-04-22 13:11:35 -07:00 |
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Kunlin Han
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9be0303493
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Add support for dumping vcd.
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2024-04-22 13:03:51 -07:00 |
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David Harris
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26711083df
|
Flushing uart.out file to observe progress
|
2024-04-21 20:08:35 -07:00 |
|
David Harris
|
03f49dea3f
|
regression printing improvements
|
2024-04-21 19:45:09 -07:00 |
|
David Harris
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be15a11622
|
Fixed conflicts on getenv
|
2024-04-21 08:38:13 -07:00 |
|
David Harris
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00a1c0fc57
|
Fixed WALLY/RISCV paths in testbench/rom1p1r; search log files for warnings and errors
|
2024-04-21 00:02:15 -07:00 |
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David Harris
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1817ab2e11
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testbench import is happy now for Questa, but throws lint warning for VCS
|
2024-04-20 23:13:13 -07:00 |
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David Harris
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fd6a6b2249
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environment variable cleanup
|
2024-04-20 22:52:08 -07:00 |
|
David Harris
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a1876b1e7c
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script cleanup
|
2024-04-20 17:22:31 -07:00 |
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David Harris
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338f37b570
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Moved getenv/getenvval declaration to config-shared so lint and regression both run
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2024-04-20 17:19:42 -07:00 |
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David Harris
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571b67f565
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Merging PR738
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2024-04-20 17:15:17 -07:00 |
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slmnemo
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f0229e970b
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Fixed getenvvar verilator bug in rom1p1r, Removed unused system function from testbench.
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2024-04-20 17:07:54 -07:00 |
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slmnemo
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66a002d879
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Removed unused rmCmd string declaration
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2024-04-20 16:58:23 -07:00 |
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slmnemo
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354d447269
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Changed testbench to use fopen instead of opening and closing uartfile whenever writing
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2024-04-20 16:56:54 -07:00 |
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David Harris
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d9ebfdfc4f
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Enabled Zcb tests
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2024-04-20 13:16:54 -07:00 |
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Quswar Abid
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1b18568d87
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the fix Rose provided in meeting
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2024-04-17 09:39:21 -07:00 |
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Kunlin Han
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29c19d9cb4
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Add system function through DPI to avoid missing support in Verilator.
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2024-04-16 11:23:00 -07:00 |
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Rose Thompson
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1eb1beed95
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Fixed merge conflict bug in the last pull request.
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2024-04-16 10:32:24 -05:00 |
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Rose Thompson
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9fe86712d8
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Merge branch 'main' into wsim_verilator
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2024-04-16 09:07:50 -05:00 |
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David Harris
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160162c98a
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Merge pull request #728 from Karl-Han/verilator_getenv
Add support for getenvval as wrapper for Verilator's getenv
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2024-04-15 17:55:34 -06:00 |
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slmnemo
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39ae26a897
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Added documentation for known Verilator hierarchy bug
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2024-04-15 15:58:09 -07:00 |
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slmnemo
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4b80457f3e
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Fixed issue with Verilator hierarchical referencing by changing module names, moved run-imperas-linux to correct directory
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2024-04-12 21:58:20 -07:00 |
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slmnemo
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342c99d6ea
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Rearranged uart_logger block to only generate if UART is supported
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2024-04-12 21:30:33 -07:00 |
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Kunlin Han
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eeb5c59143
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Remove unnecessary sig and avoid uninitialized signal inside always block.
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2024-04-12 16:06:10 -07:00 |
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Kunlin Han
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4d9de94029
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Add support for getenvval as wrapper for Verilator's getenv.
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2024-04-12 14:59:04 -07:00 |
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David Harris
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60e70c1986
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Fixed testbench-fp replication length for regression-wally --testfloat. Changed regression-wally to expect -- in named arguments.
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2024-04-08 05:57:18 -07:00 |
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David Harris
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d182a2925e
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Fixed bug in testbench_fp for XLEN > FLEN
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2024-04-07 05:40:18 -07:00 |
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Rose Thompson
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bb072fba84
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Fixed the buildroot issue.
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2024-04-06 18:25:53 -05:00 |
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Rose Thompson
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46fdfde7ec
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Removed unnecessary display from testbench.
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2024-04-06 16:10:18 -05:00 |
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Rose Thompson
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8885c32f7c
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-04-06 15:55:00 -05:00 |
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David Harris
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e8111da88a
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Removed unused old regression-wally
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2024-04-06 13:47:44 -07:00 |
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David Harris
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6b844a2e6e
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Added GUI support and removed unused wave files
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2024-04-06 13:43:06 -07:00 |
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David Harris
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3c855e3e90
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Passing arguments to buildroot, not yet checking result correctly
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2024-04-06 11:42:41 -07:00 |
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David Harris
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b3f007ec7f
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Working on buildroot in regression
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2024-04-06 11:11:22 -07:00 |
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David Harris
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ac9a21873d
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Pass TEST to testbench with +TEST=<name> rather than -G TEST=<name> so that we don't have to recompile for every new test
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2024-04-06 10:34:21 -07:00 |
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David Harris
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9ee7544d3c
|
TestFloat running; normal testbench broken
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2024-04-06 09:28:07 -07:00 |
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David Harris
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4b19f6d542
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testfloat running through wsim; moved lint, regression, wsim to bin directory so we don't need ./
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2024-04-06 08:22:39 -07:00 |
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slmnemo
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d107a42e8c
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Replaced rewrite command with system rm command for uart file. Fixed comment on line 573
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2024-04-05 21:39:41 -07:00 |
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slmnemo
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2fcae601a9
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Replaced funky rewrite call with file removal
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2024-04-05 20:59:08 -07:00 |
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David Harris
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7b56809323
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wsim runs a Questa sim
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2024-04-05 19:08:14 -07:00 |
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slmnemo
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3ee25c8936
|
Merged testbench changes
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2024-04-05 17:20:03 -07:00 |
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slmnemo
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5378b61eb2
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Added UART output file buildroot_uart.out for Linux test 'buildroot'.
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2024-04-05 17:18:03 -07:00 |
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Rose Thompson
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23e51e7277
|
starting on functional coverage for fence.i.
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2024-04-04 15:44:57 -05:00 |
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David Harris
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ccd0e9cd0c
|
Clean up testbench-fp for Verilator
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2024-04-03 17:26:41 -07:00 |
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David Harris
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ae8d581f4e
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Started implementing Verilator for testfloat
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2024-04-03 17:09:19 -07:00 |
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Divya2030
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aa6eacbce5
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Merge branch 'openhwgroup:main' into main
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2024-04-03 10:40:30 -07:00 |
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Divya2030
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135f3b6f8f
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vcs testbench
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2024-04-03 10:39:02 -07:00 |
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David Harris
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8755966f50
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Incorporated Kunlin's Verilator hack so testbench runs 110x faster. Isolated within ifdef VERILATOR to make it easier to remove when Verilator issue 4967 is resolved
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2024-04-03 07:23:02 -07:00 |
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David Harris
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8741b01818
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-04-03 06:51:24 -07:00 |
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David Harris
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929eb0430c
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Testbench uses posedge control signals to speed up Verilator
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2024-04-03 06:51:18 -07:00 |
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Rose Thompson
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c11d7ea55e
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Fixed bug in the testbench which did not allow external memory to work correctly.
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2024-04-01 10:59:40 -05:00 |
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Rose Thompson
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4a7c16990f
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-03-28 13:45:12 -05:00 |
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Rose Thompson
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35eba468f7
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Removed unused testbench-xcelium.sv.
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2024-03-28 13:43:26 -05:00 |
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Rose Thompson
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b87cdd49a3
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Merge pull request #690 from davidharrishmc/dev
fcvt.h.l fixes, removed delays
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2024-03-28 13:42:41 -05:00 |
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Rose Thompson
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081cf5be55
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Fixed the CacheHit logger bug.
|
2024-03-28 13:40:01 -05:00 |
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David Harris
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4eb7de7381
|
Removed Zfh tests from wally-riscv-arch-test now that they are available in riscv-arch-test
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2024-03-26 13:58:59 -07:00 |
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David Harris
|
0caab3c0c9
|
Removed delays from cacheLRU and testbench
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2024-03-25 12:20:25 -07:00 |
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David Harris
|
690338b758
|
Incorporated fixed fcvt.h.l* instructions; they now run in the testbench
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2024-03-25 06:08:27 -07:00 |
|
Jordan Carlin
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d580d7af5d
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-03-23 17:56:23 -07:00 |
|
Jordan Carlin
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fd97108dc3
|
Update testbench-fp to support Zfa in FPU modules
|
2024-03-23 17:55:59 -07:00 |
|
David Harris
|
bae52cf13d
|
Merge pull request #678 from Karl-Han/latest
[Resolved Conflict] Remove all #delay from non-testbench
|
2024-03-23 15:18:04 -07:00 |
|
Kunlin Han
|
22b59138f0
|
Remove all #delay from non-testbench.
|
2024-03-16 11:20:32 -07:00 |
|
David Harris
|
b4a914a6e3
|
Commented out fcvt.h.l tests that don't run on fh_arch64gc arch64zfh; added testbench feature to print when the program jumps to address 0, presumably a bad trap handler
|
2024-03-14 21:53:30 -07:00 |
|
David Harris
|
9ff9f9e0ae
|
Updated wally-riscv-arch-test to be able to compile zfh and zfa tests. This caused a change in startup code, so certain reference_output results needed to change to compensate. Also commented out fcvtmod test in Zfa that fails because Sail produces the wrong expected value.
|
2024-03-14 19:03:57 -07:00 |
|
Kunlin Han
|
8c67a76912
|
Remove all #delay from non-testbench.
|
2024-03-13 10:31:40 -07:00 |
|
David Harris
|
9a1fdba077
|
Added more Zbkb tests shared with Zbb
|
2024-03-10 22:24:16 -07:00 |
|
David Harris
|
2580d37fc0
|
ZK cleanup, check no LLEN > XLEN without D$, add half and quad float load/store to instruction name decoder
|
2024-03-10 22:03:57 -07:00 |
|
Rose Thompson
|
3cf6a19729
|
Merge branch 'main' into main
|
2024-03-10 10:48:21 -05:00 |
|
Rose Thompson
|
e870e8137b
|
Finished Wally rvvi tracer.
|
2024-03-08 09:16:30 -06:00 |
|
Rose Thompson
|
24dffa39d5
|
Yay. David and I got our first Quad load/store instructions working!
|
2024-03-07 12:48:52 -06:00 |
|
David Harris
|
b386331cc8
|
Changed '0 to 0 where possible per Chapter 4 style guidelines
|
2024-03-06 05:48:17 -08:00 |
|
KelvinTr
|
01c45ab9d7
|
Fixed K extension changes
|
2024-02-28 17:05:08 -06:00 |
|
David Harris
|
9ba35991e3
|
Finished FPU coverage
|
2024-02-15 20:01:28 -08:00 |
|
Rose Thompson
|
6921bb265a
|
Removed old testbenches.
|
2024-02-07 16:04:28 -06:00 |
|
Rose Thompson
|
83dc9cd926
|
More cleanup.
|
2024-02-07 15:53:40 -06:00 |
|