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https://github.com/openhwgroup/cvw
synced 2025-01-23 13:04:28 +00:00
Remove unnecessary sig and avoid uninitialized signal inside always block.
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parent
7b5972ea82
commit
eeb5c59143
@ -321,13 +321,18 @@ module testbench;
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end_signature_addr = ProgramAddrLabelArray["sig_end_canary"];
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signature_size = end_signature_addr - begin_signature_addr;
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end
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logic EcallFaultM;
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if (P.ZICSR_SUPPORTED)
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assign EcallFaultM = dut.core.priv.priv.EcallFaultM;
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else
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assign EcallFaultM = 0;
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always @(posedge clk) begin
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////////////////////////////////////////////////////////////////////////////////
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// Verify the test ran correctly by checking the memory against a known signature.
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////////////////////////////////////////////////////////////////////////////////
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if(TestBenchReset) test = 1;
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if (P.ZICSR_SUPPORTED & TEST == "coremark")
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if (dut.core.priv.priv.EcallFaultM) begin
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if (EcallFaultM) begin
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$display("Benchmark: coremark is done.");
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$stop;
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end
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@ -861,20 +866,25 @@ end
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// Check errors
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testadr = ($unsigned(begin_signature_addr))/(P.XLEN/8);
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testadrNoBase = (begin_signature_addr - P.UNCORE_RAM_BASE)/(P.XLEN/8);
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// logic UNCORE_RAM_SUPPORTED;
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// if(P.UNCORE_RAM_SUPPORTED)
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// assign UNCORE_RAM_SUPPORTED = P.UNCORE_RAM_SUPPORTED;
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// else
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// assign UNCORE_RAM_SUPPORTED = 0;
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for (i=0; i<sigentries; i++) begin
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logic [P.XLEN-1:0] sig;
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// **************************************
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// ***** BUG BUG BUG make sure RT undoes this.
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//if (P.DTIM_SUPPORTED) sig = testbench.dut.core.lsu.dtim.dtim.ram.RAM[testadrNoBase+i];
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//else if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncore.uncore.ram.ram.memory.RAM[testadrNoBase+i];
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if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncore.uncore.ram.ram.memory.RAM[testadrNoBase+i];
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//if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncore.uncore.ram.ram.memory.RAM[testadrNoBase+i];
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//$display("signature[%h] = %h sig = %h", i, signature[i], sig);
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//if (signature[i] !== sig & (signature[i] !== testbench.DCacheFlushFSM.ShadowRAM[testadr+i])) begin
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if (signature[i] !== testbench.DCacheFlushFSM.ShadowRAM[testadr+i]) begin
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errors = errors+1;
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$display(" Error on test %s result %d: adr = %h sim (D$) %h sim (DTIM_SUPPORTED) = %h, signature = %h",
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TestName, i, (testadr+i)*(P.XLEN/8), testbench.DCacheFlushFSM.ShadowRAM[testadr+i], sig, signature[i]);
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// $display(" Error on test %s result %d: adr = %h sim (D$) %h sim (DTIM_SUPPORTED) = %h, signature = %h",
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// TestName, i, (testadr+i)*(P.XLEN/8), testbench.DCacheFlushFSM.ShadowRAM[testadr+i], sig, signature[i]);
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$display(" Error on test %s result %d: adr = %h sim (D$) %h signature = %h",
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TestName, i, (testadr+i)*(P.XLEN/8), testbench.DCacheFlushFSM.ShadowRAM[testadr+i], signature[i]);
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$stop; // if this is changed to $finish, wally-batch.do does not get to the next step to run coverage
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end
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end
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