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https://github.com/openhwgroup/cvw
synced 2025-01-23 13:04:28 +00:00
wsim runs a Questa sim
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parent
a1d3e5b15e
commit
7b56809323
@ -20,9 +20,10 @@
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onbreak {resume}
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set CONFIG ${1}
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set CFG ${1}
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set TESTSUITE ${2}
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set WKDIR wkdir/work_${CONFIG}_${TESTSUITE}
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set WKDIR wkdir/${CFG}_${TESTSUITE}
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set WALLY $::env(WALLY)
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# create library
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if [file exists ${WKDIR}] {
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@ -67,12 +68,16 @@ if {$argc >= 3} {
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# "Extra checking for conflicts with always_comb done at vopt time"
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# because vsim will run vopt
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vlog -lint -work ${WKDIR} +incdir+../config/$1 +incdir+../config/deriv/$1 +incdir+../config/shared ../src/cvw.sv ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv ../src/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
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set CONFIG ${WALLY}/config
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set SRC ${WALLY}/src
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set TB ${WALLY}/testbench
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vlog -lint -work ${WKDIR} +incdir+${CONFIG}/$1 +incdir+${CONFIG}/deriv/$1 +incdir+${CONFIG}/shared ${SRC}/cvw.sv ${TB}/testbench.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
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# start and run simulation
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# remove +acc flag for faster sim during regressions if there is no need to access internal signals
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vopt wkdir/work_${1}_${2}.testbench -work wkdir/work_${1}_${2} -G TEST=$2 ${configOptions} -o testbenchopt ${CoverageVoptArg}
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vsim -lib wkdir/work_${1}_${2} testbenchopt -fatal 7 -suppress 3829 ${CoverageVsimArg}
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vopt wkdir/${CFG}_${TESTSUITE}.testbench -work ${WKDIR} -G TEST=$2 ${configOptions} -o testbenchopt ${CoverageVoptArg}
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vsim -lib ${WKDIR} testbenchopt -fatal 7 -suppress 3829 ${CoverageVsimArg}
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# vsim -lib wkdir/work_${1}_${2} testbenchopt -fatal 7 -suppress 3829
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# power add generates the logging necessary for said generation.
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@ -82,9 +87,10 @@ run -all
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if {$coverage} {
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echo "Saving coverage to ${1}_${2}.ucdb"
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set UCDB cov/${CONFIG}_${TESTSUITE}.ucdb
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echo "Saving coverage to ${UCDB}"
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do coverage-exclusions-rv64gc.do # beware: this assumes testing the rv64gc configuration
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coverage save -instance /testbench/dut/core cov/${1}_${2}.ucdb
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coverage save -instance /testbench/dut/core ${UCDB}
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}
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# These aren't doing anything helpful
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3
sim/wsim
3
sim/wsim
@ -11,6 +11,7 @@
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# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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import argparse
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import os
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# Read arguments
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parser = argparse.ArgumentParser()
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@ -23,7 +24,7 @@ print("Config: " + args.config + " tests " + args.testsuite + " sim " + args.sim
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if (args.sim == "questa"):
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cmd = "do wally-batch.do " + args.config + " " + args.testsuite
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system("vsim -c -do \"" + cmd + "\"")
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os.system("cd questa; vsim -c -do \"" + cmd + "\"")
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elif (args.sim == "verilator"):
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print("Running Verilator")
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elif (args.sim == "vcs"):
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@ -35,12 +35,12 @@
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string tvpaths[] = '{
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"$RISCV/imperas-riscv-tests/work/",
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"../tests/riscof/work/riscv-arch-test/",
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"../tests/riscof/work/wally-riscv-arch-test/",
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"../benchmarks/coremark/work/",
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"../addins/embench-iot/",
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"../tests/custom/work/",
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"../tests/coverage/"
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"../../tests/riscof/work/riscv-arch-test/",
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"../../tests/riscof/work/wally-riscv-arch-test/",
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"../../benchmarks/coremark/work/",
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"../../addins/embench-iot/",
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"../../tests/custom/work/",
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"../../tests/coverage/"
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};
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string coverage64gc[] = '{
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