cvw/testbench
2024-03-14 19:03:57 -07:00
..
common ZK cleanup, check no LLEN > XLEN without D$, add half and quad float load/store to instruction name decoder 2024-03-10 22:03:57 -07:00
fp
sdc
testbench-fp.sv
testbench-imperas.sv
testbench-xcelium.sv Merge branch 'main' into main 2024-03-10 10:48:21 -05:00
testbench.sv Merge branch 'main' into main 2024-03-10 10:48:21 -05:00
tests-fp.vh
tests.vh Updated wally-riscv-arch-test to be able to compile zfh and zfa tests. This caused a change in startup code, so certain reference_output results needed to change to compensate. Also commented out fcvtmod test in Zfa that fails because Sail produces the wrong expected value. 2024-03-14 19:03:57 -07:00
wallywrapper.sv