Testbench terminates buildroot sim at instruction limit

This commit is contained in:
David Harris 2024-05-09 07:58:53 -07:00
parent 47af54b131
commit bdd0043cd1

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@ -644,7 +644,7 @@ module testbench;
always @(negedge clk) begin
if (INSTR_LIMIT > 0) begin
if((Minstret != 0) && (Minstret % 'd100000 == 0)) $display("Reached %d instructions", Minstret);
if((Minstret == INSTR_LIMIT) & (INSTR_LIMIT!=0)) begin $stop; $stop; end
if((Minstret == INSTR_LIMIT) & (INSTR_LIMIT!=0)) begin $finish; end
end
end
end