mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-02 17:55:19 +00:00
Merge branch 'main' of https://github.com/openhwgroup/cvw
This commit is contained in:
Rose Thompson
commit
ceb31fec68
@ -28,9 +28,9 @@ tests = [
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["rv32i", ["arch32i"]],
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["rv32imc", ["arch32i", "arch32c", "arch32m", "wally32periph"]],
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["rv32gc", ["arch32f", "arch32d", "arch32f_fma", "arch32d_fma", "arch32f_divsqrt", "arch32d_divsqrt",
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"arch32i", "arch32priv", "arch32c", "arch32m", "arch32a", "arch32zifencei", "arch32zicond",
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"arch32i", "arch32priv", "arch32c", "arch32m", "arch32a_amo", "arch32zifencei", "arch32zicond",
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"arch32zba", "arch32zbb", "arch32zbc", "arch32zbs", "arch32zfh", "arch32zfh_fma",
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"arch32zfh_divsqrt", "arch32zfaf", "arch32zfad", "wally32a", "wally32priv", "wally32periph", "arch32zcb",
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"arch32zfh_divsqrt", "arch32zfaf", "arch32zfad", "wally32a_lrsc", "wally32priv", "wally32periph", "arch32zcb",
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"arch32zbkb", "arch32zbkc", "arch32zbkx", "arch32zknd", "arch32zkne", "arch32zknh"]],
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["rv64i", ["arch64i"]]
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]
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@ -51,7 +51,7 @@ tests_buildrootboot = [
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# Separate out floating-point tests for RV64 to speed up coverage
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tests64gc_nofp = [
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["rv64gc", ["coverage64gc", "arch64i", "arch64priv", "arch64c", "arch64m", "arch64zcb",
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"arch64zifencei", "arch64zicond", "arch64a", "wally64a", "wally64periph", "wally64priv",
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"arch64zifencei", "arch64zicond", "arch64a_amo", "wally64a_lrsc", "wally64periph", "wally64priv",
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"arch64zbkb", "arch64zbkc", "arch64zbkx", "arch64zknd", "arch64zkne", "arch64zknh",
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"arch64zba", "arch64zbb", "arch64zbc", "arch64zbs"]] # add when working: "arch64zicboz"
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]
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@ -93,6 +93,12 @@ derivconfigtests = [
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["nodcache_rv64gc", ["ahb64"]],
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["nocache_rv64gc", ["ahb64"]],
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# Atomic variatnts
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["zaamo_rv64gc", ["arch64i", "arch64a_amo"]],
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["zalrsc_rv64gc", ["arch64i", "wally64a_lrsc"]],
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["zaamo_rv32gc", ["arch32i", "arch32a_amo"]],
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["zalrsc_rv32gc", ["arch32i", "wally32a_lrsc"]],
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### add misaligned tests
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# fp/int divider permutations
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7
bin/wsim
7
bin/wsim
@ -54,10 +54,7 @@ for d in ["logs", "wkdir", "cov"]:
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cd = "cd $WALLY/sim/" +args.sim
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if (args.sim == "questa"):
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if (args.tb == "testbench_fp"):
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args.args = " -GTEST=" + args.testsuite + " " + args.args
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# cmd = "do wally.do " + args.config + " " + args.testsuite + " " + args.tb + " " + " -GTEST=" + args.testsuite + " " + args.args
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# else:
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# cmd = "do wally.do " + args.config + " " + args.testsuite + " " + args.tb + " " + args.args
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args.args = " -GTEST=\"" + args.testsuite + "\" " + args.args
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cmd = "do wally.do " + args.config + " " + args.testsuite + " " + args.tb + " " + args.args
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if (args.coverage):
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cmd += " -coverage"
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@ -76,7 +73,7 @@ elif (args.sim == "verilator"):
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if (args.gui):
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print("GUI option not available for Verilator")
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exit(1)
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os.system(f"/usr/bin/make -C {regressionDir}/verilator WALLYCONF={args.config} TEST={args.testsuite} EXTRA_ARGS='{args.args}'")
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os.system(f"/usr/bin/make -C {regressionDir}/verilator WALLYCONF={args.config} TEST={args.testsuite} TESTBENCH={args.tb} EXTRA_ARGS='{args.args}'")
|
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elif (args.sim == "vcs"):
|
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print(f"Running VCS on " + args.config + " " + args.testsuite)
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if (args.gui):
|
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|
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@ -511,6 +511,22 @@ BIGENDIAN_SUPPORTED 0
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deriv nobigendian_rv64gc rv64gc
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BIGENDIAN_SUPPORTED 0
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||||
|
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deriv zaamo_rv32gc rv32gc
|
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MISA (32'h00000104 | 1 << 20 | 1 << 18 | 1 << 12 | 1 <<3 | 1 << 5);
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ZAAMO_SUPPORTED 1
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||||
|
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deriv zalrsc_rv32gc rv32gc
|
||||
MISA (32'h00000104 | 1 << 20 | 1 << 18 | 1 << 12 | 1 <<3 | 1 << 5);
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ZALRSC_SUPPORTED 1
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||||
|
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deriv zaamo_rv64gc rv64gc
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||||
MISA (32'h00000104 | 1 << 20 | 1 << 18 | 1 << 12 | 1 <<3 | 1 << 5);
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ZAAMO_SUPPORTED 1
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||||
|
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deriv zalrsc_rv64gc rv64gc
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||||
MISA (32'h00000104 | 1 << 20 | 1 << 18 | 1 << 12 | 1 <<3 | 1 << 5);
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ZALRSC_SUPPORTED 1
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|
||||
# Floating-point modes supported
|
||||
|
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deriv f_rv32gc rv32gc
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||||
|
||||
@ -4,7 +4,7 @@ ENTRY(rvtest_entry_point)
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SECTIONS
|
||||
{
|
||||
. = 0x80000000;
|
||||
.text : { *(.text.init) }
|
||||
.text : { *(.text.init) *(.text) }
|
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. = ALIGN(0x1000);
|
||||
.tohost : { *(.tohost) }
|
||||
. = ALIGN(0x1000);
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||||
|
||||
@ -16,11 +16,7 @@
|
||||
# sqrt - test square root
|
||||
# all - test everything
|
||||
|
||||
#vsim -c -do "do testfloat.do fdqh_ieee_rv64gc $1"
|
||||
|
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verilator -GTEST="\"all\"" -GTEST_SIZE="\"all\"" --timescale "1ns/1ns" --timing --binary --top-module testbenchfp "-I../config/shared" "-I../config/deriv/fdqh_ieee_rv64gc" ../src/cvw.sv ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/fpu/*/*.sv ../src/generic/*.sv ../src/generic/flop/*.sv --relative-includes
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||||
|
||||
#vlog +incdir+../config/deriv/$1 +incdir+../config/$1 +incdir+../config/shared ../src/cvw.sv ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/fpu/*/*.sv ../src/generic/*.sv ../src/generic/flop/*.sv -suppress 2583,7063,8607,2697
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wsim fdqh_ieee_rv64gc add --tb testbench_fp --sim verilator
|
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|
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# Change TEST_SIZE to only test certain FP width
|
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# values are QP, DP, SP, HP or all for all tests
|
||||
|
||||
@ -16,6 +16,7 @@ EXTRA_ARGS=
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||||
|
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WALLYCONF?=rv64gc
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TEST?=arch64i
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TESTBENCH?=testbench
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|
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# constants
|
||||
# assume WALLY variable is correctly configured in the shell environment
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@ -24,47 +25,60 @@ TARGET=$(WORKING_DIR)/target
|
||||
# INCLUDE_PATH are pathes that Verilator should search for files it needs
|
||||
INCLUDE_PATH="-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" "-I${WALLY}/config/deriv/$(WALLYCONF)"
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# SOURCES are source files
|
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SOURCES=${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
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SOURCES=${WALLY}/src/cvw.sv ${WALLY}/testbench/${TESTBENCH}.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
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# DEPENDENCIES are configuration files and source files, which leads to recompilation of executables
|
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DEPENDENCIES=${WALLY}/config/shared/*.vh $(SOURCES)
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||||
|
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# regular testbench requires a wrapper defining getenvval
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ifeq ($(TESTBENCH), testbench)
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WRAPPER=${WALLY}/sim/verilator/wrapper.c
|
||||
GTEST=
|
||||
ARGTEST=+TEST=$(TEST)
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else
|
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WRAPPER=
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GTEST=-GTEST="\"${TEST}\""
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||||
ARGTEST=
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||||
endif
|
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|
||||
default: run
|
||||
|
||||
run: wkdir/$(WALLYCONF)_$(TEST)/Vtestbench
|
||||
run: wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH}
|
||||
mkdir -p $(VERILATOR_DIR)/logs
|
||||
wkdir/$(WALLYCONF)_$(TEST)/Vtestbench +TEST=$(TEST)
|
||||
wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH} ${ARGTEST}
|
||||
|
||||
profile: obj_dir_profiling/Vtestbench_$(WALLYCONF)
|
||||
$(VERILATOR_DIR)/obj_dir_profiling/Vtestbench_$(WALLYCONF) +TEST=$(TEST)
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profile: obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF)
|
||||
$(VERILATOR_DIR)/obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF) ${ARGTEST}
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mv gmon.out gmon_$(WALLYCONF).out
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gprof $(VERILATOR_DIR)/obj_dir_profiling/Vtestbench_$(WALLYCONF) gmon_$(WALLYCONF).out > gmon_$(WALLYCONF).log
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gprof $(VERILATOR_DIR)/obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF) gmon_$(WALLYCONF).out > gmon_$(WALLYCONF).log
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verilator_profcfunc gmon_$(WALLYCONF).log > gmon_$(WALLYCONF).log2
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mkdir -p $(VERILATOR_DIR)/logs_profiling
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mv gmon_$(WALLYCONF)* $(VERILATOR_DIR)/logs_profiling
|
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echo "Please check $(VERILATOR_DIR)/logs_profiling/gmon_$(WALLYCONF)* for logs and output files."
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||||
|
||||
wkdir/$(WALLYCONF)_$(TEST)/Vtestbench: $(DEPENDENCIES)
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wkdir/$(WALLYCONF)_$(TEST)/V${TESTBENCH}: $(DEPENDENCIES)
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||||
mkdir -p wkdir/$(WALLYCONF)_$(TEST)
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verilator \
|
||||
--Mdir wkdir/$(WALLYCONF)_$(TEST) -o Vtestbench \
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--Mdir wkdir/$(WALLYCONF)_$(TEST) -o V${TESTBENCH} \
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--binary --trace \
|
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$(OPT) $(PARAMS) $(NONPROF) \
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$(EXTRA_ARGS) \
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--top-module testbench --relative-includes \
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--top-module ${TESTBENCH} --relative-includes \
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$(INCLUDE_PATH) \
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${WALLY}/sim/verilator/wrapper.c \
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${WRAPPER} \
|
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${GTEST} \
|
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$(SOURCES)
|
||||
|
||||
obj_dir_profiling/Vtestbench_$(WALLYCONF): $(DEPENDENCIES)
|
||||
obj_dir_profiling/V${TESTBENCH}_$(WALLYCONF): $(DEPENDENCIES)
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mkdir -p obj_dir_profiling
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verilator \
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--Mdir obj_dir_profiling -o Vtestbench_$(WALLYCONF) \
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--Mdir obj_dir_profiling -o V${TESTBENCH}_$(WALLYCONF) \
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--binary \
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--prof-cfuncs $(OPT) $(PARAMS) \
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$(EXTRA_ARGS) \
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--top-module testbench --relative-includes \
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--top-module ${TESTBENCH} --relative-includes \
|
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$(INCLUDE_PATH) \
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${WALLY}/sim/verilator/wrapper.c \
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${WRAPPER} \
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${GTEST} \
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$(SOURCES)
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clean:
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@ -128,7 +128,7 @@ module testbench;
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if (P.ZICSR_SUPPORTED) tests = {arch64c, arch64cpriv};
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else tests = {arch64c};
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"arch64m": if (P.M_SUPPORTED) tests = arch64m;
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"arch64a": if (P.A_SUPPORTED) tests = arch64a;
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"arch64a_amo": if (P.A_SUPPORTED | P.ZAAMO_SUPPORTED) tests = arch64a_amo;
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"arch64f": if (P.F_SUPPORTED) tests = arch64f;
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"arch64d": if (P.D_SUPPORTED) tests = arch64d;
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"arch64f_fma": if (P.F_SUPPORTED) tests = arch64f_fma;
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@ -142,7 +142,7 @@ module testbench;
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"imperas64d": if (P.D_SUPPORTED) tests = imperas64d;
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"imperas64m": if (P.M_SUPPORTED) tests = imperas64m;
|
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"wally64q": if (P.Q_SUPPORTED) tests = wally64q;
|
||||
"wally64a": if (P.A_SUPPORTED) tests = wally64a;
|
||||
"wally64a_lrsc": if (P.A_SUPPORTED | P.ZALRSC_SUPPORTED) tests = wally64a_lrsc;
|
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"imperas64c": if (P.C_SUPPORTED) tests = imperas64c;
|
||||
else tests = imperas64iNOc;
|
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"custom": tests = custom;
|
||||
@ -181,7 +181,7 @@ module testbench;
|
||||
if (P.ZICSR_SUPPORTED) tests = {arch32c, arch32cpriv};
|
||||
else tests = {arch32c};
|
||||
"arch32m": if (P.M_SUPPORTED) tests = arch32m;
|
||||
"arch32a": if (P.A_SUPPORTED) tests = arch32a;
|
||||
"arch32a_amo": if (P.A_SUPPORTED | P.ZAAMO_SUPPORTED) tests = arch32a_amo;
|
||||
"arch32f": if (P.F_SUPPORTED) tests = arch32f;
|
||||
"arch32d": if (P.D_SUPPORTED) tests = arch32d;
|
||||
"arch32f_fma": if (P.F_SUPPORTED) tests = arch32f_fma;
|
||||
@ -193,7 +193,7 @@ module testbench;
|
||||
"imperas32i": tests = imperas32i;
|
||||
"imperas32f": if (P.F_SUPPORTED) tests = imperas32f;
|
||||
"imperas32m": if (P.M_SUPPORTED) tests = imperas32m;
|
||||
"wally32a": if (P.A_SUPPORTED) tests = wally32a;
|
||||
"wally32a_lrsc": if (P.A_SUPPORTED | P.ZALRSC_SUPPORTED) tests = wally32a_lrsc;
|
||||
"imperas32c": if (P.C_SUPPORTED) tests = imperas32c;
|
||||
else tests = imperas32iNOc;
|
||||
"wally32i": tests = wally32i;
|
||||
|
||||
@ -51,16 +51,16 @@ module testbench_fp;
|
||||
logic [31:0] errors=0; // how many errors
|
||||
logic [31:0] VectorNum=0; // index for test vector
|
||||
logic [31:0] FrmNum=0; // index for rounding mode
|
||||
logic [P.FLEN*4+7:0] TestVectors[MAXVECTORS-1:0]; // list of test vectors
|
||||
logic [P.Q_LEN*4+7:0] TestVectors[MAXVECTORS-1:0]; // list of test vectors
|
||||
|
||||
logic [1:0] FmtVal; // value of the current Fmt
|
||||
logic [2:0] UnitVal, OpCtrlVal, FrmVal; // value of the currnet Unit/OpCtrl/FrmVal
|
||||
logic WriteIntVal; // value of the current WriteInt
|
||||
logic [P.FLEN-1:0] X, Y, Z; // inputs read from TestFloat
|
||||
logic [P.Q_LEN-1:0] X, Y, Z; // inputs read from TestFloat
|
||||
logic [P.FLEN-1:0] XPostBox; // inputs read from TestFloat
|
||||
logic [P.XLEN-1:0] SrcA; // integer input
|
||||
logic [P.FLEN-1:0] Ans; // correct answer from TestFloat
|
||||
logic [P.FLEN-1:0] Res; // result from other units
|
||||
logic [P.Q_LEN-1:0] Ans; // correct answer from TestFloat
|
||||
logic [P.Q_LEN-1:0] Res; // result from other units
|
||||
logic [4:0] AnsFlg; // correct flags read from testfloat
|
||||
logic [4:0] ResFlg, Flg; // Result flags
|
||||
logic [P.FMTBITS-1:0] ModFmt; // format - 10 = half, 00 = single, 01 = double, 11 = quad
|
||||
@ -733,7 +733,7 @@ module testbench_fp;
|
||||
if (TEST === "cmp" | TEST === "all") begin: fcmp
|
||||
fcmp #(P) fcmp (.Fmt(ModFmt), .OpCtrl(OpCtrlVal), .Zfa(1'b0), .Xs, .Ys, .Xe, .Ye,
|
||||
.Xm, .Ym, .XZero, .YZero, .CmpIntRes(CmpRes),
|
||||
.XNaN, .YNaN, .XSNaN, .YSNaN, .X, .Y, .CmpNV(CmpFlg[4]), .CmpFpRes(FpCmpRes));
|
||||
.XNaN, .YNaN, .XSNaN, .YSNaN, .X(X[P.FLEN-1:0]), .Y(Y[P.FLEN-1:0]), .CmpNV(CmpFlg[4]), .CmpFpRes(FpCmpRes));
|
||||
end
|
||||
|
||||
if (TEST === "div" | TEST === "sqrt" | TEST === "all") begin: fdivsqrt
|
||||
@ -975,7 +975,7 @@ module testbench_fp;
|
||||
errors += 1;
|
||||
$display("\nError in %s", Tests[TestNum]);
|
||||
$display("TestNum %d OpCtrl %d", TestNum, OpCtrl[TestNum]);
|
||||
$display("inputs: %h %h %h\nSrcA: %h\n Res: %h %h\n Expected: %h %h", X, Y, Z, SrcA, Res, ResFlg, Ans, AnsFlg);
|
||||
$display("inputs: %h %h %h\nSrcA: %h\n Res: %h %h\n Expected: %h %h", X[P.FLEN-1:0], Y[P.FLEN-1:0], Z[P.FLEN-1:0], SrcA, Res[P.FLEN-1:0], ResFlg, Ans[P.FLEN-1:0], AnsFlg);
|
||||
$stop;
|
||||
end
|
||||
|
||||
@ -1012,14 +1012,14 @@ endmodule
|
||||
|
||||
module readvectors import cvw::*; #(parameter cvw_t P) (
|
||||
input logic clk,
|
||||
input logic [P.FLEN*4+7:0] TestVector,
|
||||
input logic [P.Q_LEN*4+7:0] TestVector,
|
||||
input logic [P.FMTBITS-1:0] ModFmt,
|
||||
input logic [1:0] Fmt,
|
||||
input logic [2:0] Unit,
|
||||
input logic [31:0] VectorNum,
|
||||
input logic [31:0] TestNum,
|
||||
input logic [2:0] OpCtrl,
|
||||
output logic [P.FLEN-1:0] Ans,
|
||||
output logic [P.Q_LEN-1:0] Ans,
|
||||
output logic [P.XLEN-1:0] SrcA,
|
||||
output logic [4:0] AnsFlg,
|
||||
output logic Xs, Ys, Zs, // sign bits of XYZ
|
||||
@ -1031,7 +1031,8 @@ module readvectors import cvw::*; #(parameter cvw_t P) (
|
||||
output logic XZero, YZero, ZZero, // is XYZ zero
|
||||
output logic XInf, YInf, ZInf, // is XYZ infinity
|
||||
output logic XExpMax,
|
||||
output logic [P.FLEN-1:0] X, Y, Z, XPostBox
|
||||
output logic [P.Q_LEN-1:0] X, Y, Z,
|
||||
output logic [P.FLEN-1:0] XPostBox
|
||||
);
|
||||
|
||||
localparam Q_LEN = 32'd128;
|
||||
@ -1048,7 +1049,7 @@ module readvectors import cvw::*; #(parameter cvw_t P) (
|
||||
case (Unit)
|
||||
`FMAUNIT:
|
||||
case (Fmt)
|
||||
2'b11: begin // quad
|
||||
2'b11: if (P.Q_SUPPORTED) begin // quad
|
||||
if (OpCtrl === `FMA_OPCTRL) begin
|
||||
X = TestVector[8+4*(P.Q_LEN)-1:8+3*(P.Q_LEN)];
|
||||
Y = TestVector[8+3*(P.Q_LEN)-1:8+2*(P.Q_LEN)];
|
||||
@ -1371,7 +1372,7 @@ module readvectors import cvw::*; #(parameter cvw_t P) (
|
||||
assign ZEn = (Unit == `FMAUNIT);
|
||||
assign FPUActive = 1'b1;
|
||||
|
||||
unpack #(P) unpack(.X, .Y, .Z, .Fmt(ModFmt), .FPUActive, .Xs, .Ys, .Zs, .Xe, .Ye, .Ze,
|
||||
unpack #(P) unpack(.X(X[P.FLEN-1:0]), .Y(Y[P.FLEN-1:0]), .Z(Z[P.FLEN-1:0]), .Fmt(ModFmt), .FPUActive, .Xs, .Ys, .Zs, .Xe, .Ye, .Ze,
|
||||
.Xm, .Ym, .Zm, .XNaN, .YNaN, .ZNaN, .XSNaN, .YSNaN, .ZSNaN,
|
||||
.XSubnorm, .XZero, .YZero, .ZZero, .XInf, .YInf, .ZInf,
|
||||
.XEn, .YEn, .ZEn, .XExpMax, .XPostBox);
|
||||
|
||||
@ -927,12 +927,12 @@ string imperas32f[] = '{
|
||||
"rv64i_m/Q/src/WALLY-q-01.S"
|
||||
};
|
||||
|
||||
string wally64a[] = '{
|
||||
string wally64a_lrsc[] = '{
|
||||
`WALLYTEST,
|
||||
"rv64i_m/privilege/src/WALLY-lrsc-01.S"
|
||||
};
|
||||
|
||||
string wally32a[] = '{
|
||||
string wally32a_lrsc[] = '{
|
||||
`WALLYTEST,
|
||||
"rv32i_m/privilege/src/WALLY-lrsc-01.S"
|
||||
};
|
||||
@ -974,7 +974,7 @@ string imperas32f[] = '{
|
||||
"rv64i_m/Zicond/src/czero.nez-01.S"
|
||||
};
|
||||
|
||||
string arch32a[] = '{
|
||||
string arch32a_amo[] = '{
|
||||
`RISCVARCHTEST,
|
||||
"rv32i_m/A/src/amoadd.w-01.S",
|
||||
"rv32i_m/A/src/amoand.w-01.S",
|
||||
@ -1136,7 +1136,7 @@ string imperas32f[] = '{
|
||||
"rv64i_m/M/src/remw-01.S"
|
||||
};
|
||||
|
||||
string arch64a[] = '{
|
||||
string arch64a_amo[] = '{
|
||||
`RISCVARCHTEST,
|
||||
"rv64i_m/A/src/amoadd.w-01.S",
|
||||
"rv64i_m/A/src/amoand.w-01.S",
|
||||
|
||||
Loading…
Reference in New Issue
Block a user