Merge branch 'openhwgroup:main' into main

This commit is contained in:
Divya2030 2024-05-02 10:34:15 -07:00 committed by GitHub
commit 694c69c651
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13 changed files with 324 additions and 165 deletions

10
.gitignore vendored
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@ -221,4 +221,12 @@ sim/questa/riscv.ucdb.log
sim/questa/riscv.ucdb.summary.log
sim/questa/riscv.ucdb.testdetails.log
tests/riscvdv
examples/verilog/fulladder/csrc/
examples/verilog/fulladder/profileReport.html
examples/verilog/fulladder/profileReport.json
examples/verilog/fulladder/profileReport.txt
examples/verilog/fulladder/profileReport/
examples/verilog/fulladder/simprofile_dir/
examples/verilog/fulladder/simv.daidir/
examples/verilog/fulladder/ucli.key
examples/verilog/fulladder/verdi_config_file

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@ -61,9 +61,9 @@ funcovreg:
# test_name=riscv_arithmetic_basic_test
rvdv:
python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gen >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gcc_compile >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps iss_sim >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gen,gcc_compile >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
# python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gcc_compile >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
# python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps iss_sim >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
# run-elf.bash --seed ${SIM}/questa/seed0.txt --verbose --elf ${WALLY}/tests/riscvdv/asm_test/${test_name}_0.o >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/riscv.ucdb --elf ${WALLY}/tests/riscvdv/asm_test/${test_name}_0.o >> ${SIM}/questa/regression_logs/${test_name}.log 2>&1
cp ${SIM}/questa/riscv.ucdb ${SIM}/questa/regression_ucdbs/${test_name}.ucdb

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@ -131,9 +131,10 @@ Startups can expect to spend more than $1 million on CAD tools to get a chip to
## Adding Cron Job for nightly builds
If you want to add a cronjob you can do the following:
1) `crontab -e`
2) add this code:
1) Set up the email client `mutt` for your distribution
2) Enter `crontab -e` into a terminal
3) add this code to test building CVW and then running `regression-wally --nightly` at 9:30 PM each day
```
0 3 * * * BASH_ENV=~/.bashrc bash -l -c "PATH_TO_CVW/cvw/bin/wrapper_nightly_runs.sh > PATH_TO_LOG_FOLDER/cron.log"
30 21 * * * bash -l -c "source ~/PATH/TO/CVW/setup.sh; PATH_TO_CVW/cvw/bin/wrapper_nightly_runs.sh --path {PATH_TO_TEST_LOCATION} --target all --tests nightly --send_email harris@hmc.edu,kaitlin.verilog@gmail.com"
```

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@ -16,6 +16,7 @@ Features:
These emails serve as communication channels for stakeholders, providing them with timely updates on the software's regression status.
Usage:
shutil.rmtree(file)
- The script is designed to be scheduled and executed automatically on a nightly basis using task scheduling tools such as Cronjobs. To create a cronjob do the following:
1) Open Terminal:
@ -67,7 +68,8 @@ In summary, this Python script facilitates the automation of nightly regression
import os
import shutil
from datetime import datetime
from datetime import datetime, timedelta
import time
import re
import markdown
import subprocess
@ -121,7 +123,7 @@ class FolderManager:
Delete a folder, including all of its contents
Args:
folder (list): A folder to be deleted
folders (list): A folder to be deleted
Returns:
None
@ -131,6 +133,29 @@ class FolderManager:
if os.path.exists(folder):
shutil.rmtree(folder)
def remove_stale_folders(self, folder, days_old=30):
"""
Delete all folders over X days old in a folder.
Args:
folder (str): Folder to delete folders and files from
days_old (int): Number of days old a file must be before deleting
Returns:
None
"""
dirs = os.listdir(folder)
threshold = time.time() - days_old*86400
for file in dirs:
file = os.path.join(folder, file)
file_mtime = os.stat(file).st_mtime
if file_mtime < threshold:
if os.path.isfile(file):
os.remove(file)
elif os.path.isdir(file):
shutil.rmtree(file)
def clone_repository(self, folder, repo_url):
"""
@ -576,9 +601,11 @@ class TestRunner:
self.logger.info("Converting markdown file to html file.")
def send_email(self, sender_email=None, receiver_emails=None, subject="Nightly Regression Test"):
def send_email(self, receiver_emails=None, subject="Nightly Regression Test"):
"""
Send email with HTML content.
Send email with HTML content.
!!! Requires mutt to be set up to send emails !!!
Args:
self: The instance of the class.
@ -609,7 +636,6 @@ class TestRunner:
'/usr/bin/mutt',
'-s', subject,
'-e', 'set content_type=text/html',
'-e', f'my_hdr From: <{sender_email}>',
'--', receiver_email
]
try:
@ -634,32 +660,29 @@ def main():
parser.add_argument('--path',default = "nightly", help='specify the path for where the nightly repositories will be cloned ex: "nightly-runs')
parser.add_argument('--repository',default = "https://github.com/openhwgroup/cvw", help='specify which github repository you want to clone')
parser.add_argument('--target', default = "all", help='types of tests you can make are: all, wally-riscv-arch-test')
parser.add_argument('--tests', default = "nightly", help='types of tests you can run are: test or nightly')
parser.add_argument('--send_email',default = "yes", help='do you want to send emails: "yes" or "y"')
parser.add_argument('--target', default = "all", help='types of tests you can make are: all, wally-riscv-arch-test, no')
parser.add_argument('--tests', default = "nightly", help='types of tests you can run are: nightly, test, test_lint')
parser.add_argument('--send_email',default = "", nargs="+", help='What emails to send test results to. Example: "[email1],[email2],..."')
args = parser.parse_args()
#############################################
# SETUP #
#############################################
sender_email = 'kaitlin.verilog@gmail.com'
receiver_emails = args.send_email
receiver_emails = ['thomas.kidd@okstate.edu', 'james.stine@okstate.edu', 'harris@g.hmc.edu', 'rose.thompson10@okstate.edu', 'sarah.harris@unlv.edu', 'nlucio@hmc.edu']
testing_emails = ['kaitlin.verilog@gmail.com']
# file paths for where the results and repos will be saved: repos and results can be changed to whatever
today = datetime.now().strftime("%Y-%m-%d")
yesterday_dt = datetime.now() - timedelta(days=1)
yesterday = yesterday_dt.strftime("%Y-%m-%d")
cvw_path = Path.home().joinpath(args.path, today)
results_path = Path.home().joinpath(args.path, today, "results")
log_path = Path.home().joinpath(args.path, today, "logs")
log_file_path = log_path.joinpath("nightly_build.log")
previous_cvw_path = Path.home().joinpath(args.path,f"{yesterday}/cvw")
# creates the object
folder_manager = FolderManager()
folder_manager = FolderManager()
# setting the path on where to clone new repositories of cvw
folder_manager.create_folders([cvw_path, results_path, log_path])
@ -668,18 +691,12 @@ def main():
folder_manager.clone_repository(cvw_path, args.repository)
# Define tests that we can run
test_list = [["bash", "lint-wally", "-nightly"]]
test_test = [["python", "regression-wally", ""]]
test_nightly = [["python", "regression-wally", "--nightly"]]
test_coverage = [["python", "regression-wally", "--coverage"]]
if (args.tests == "all"):
test_list += test_nightly + test_coverage
elif (args.tests == "nightly"):
test_list += test_nightly
if (args.tests == "nightly"):
test_list = [["python", "regression-wally", "--nightly"]]
elif (args.tests == "test"):
test_list += test_test
test_list = [["python", "regression-wally", ""]]
elif (args.tests == "test_lint"):
pass
test_list = [["bash", "lint-wally", "-nightly"]]
else:
print(f"Error: Invalid test '"+args.test+"' specified")
raise SystemExit
@ -801,16 +818,29 @@ def main():
# SEND EMAIL #
#############################################
if (args.send_email == "yes" or args.send_email == "y"):
test_runner.send_email(sender_email=sender_email, receiver_emails=receiver_emails)
if (args.send_email == "test"):
test_runner.send_email(sender_email=sender_email, receiver_emails=testing_emails)
if receiver_emails:
test_runner.send_email(receiver_emails=receiver_emails)
#############################################
# DELETE REPOSITORY AFTER TESTING #
# DELETE REPOSITORY OF PREVIOUS NIGHTLYS #
#############################################
folder_manager.remove_folder([test_runner.cvw])
threshold = time.time() - 86400*1
for log_dir in os.listdir(args.path):
try:
cvw_dir = os.path.join(args.path,log_dir,"cvw")
cvw_mtime = os.stat(cvw_dir).st_mtime
if cvw_mtime < threshold:
logger.info(f"Found {cvw_dir} older than 1 day, removing")
shutil.rmtree(cvw_dir)
except Exception as e:
if os.path.exists(cvw_dir):
logger.info(f"ERROR: Failed to remove previous nightly run repo with error {e}")
#############################################
# DELETE STALE LOGS AFTER TESTING #
#############################################
folder_manager.remove_stale_folders(folder=args.path, days_old=30)
if __name__ == "__main__":
main()

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@ -30,8 +30,8 @@ tests = [
["rv32gc", ["arch32f", "arch32d", "arch32f_fma", "arch32d_fma", "arch32f_divsqrt", "arch32d_divsqrt",
"arch32i", "arch32priv", "arch32c", "arch32m", "arch32a", "arch32zifencei", "arch32zicond",
"arch32zba", "arch32zbb", "arch32zbc", "arch32zbs", "arch32zfh", "arch32zfh_fma",
"arch32zfh_divsqrt", "arch32zfaf", "wally32a", "wally32priv", "wally32periph", "arch32zcb",
"arch32zbkb", "arch32zbkc", "arch32zbkx", "arch32zknd", "arch32zkne", "arch32zknh"]], # "arch32zfad" # fcvtmod.w.d not working because of Sail flag bug. Jordan has PR in to fix Sail
"arch32zfh_divsqrt", "arch32zfaf", "arch32zfad", "wally32a", "wally32priv", "wally32periph", "arch32zcb",
"arch32zbkb", "arch32zbkc", "arch32zbkx", "arch32zknd", "arch32zkne", "arch32zknh"]],
["rv64i", ["arch64i"]]
]

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@ -3,7 +3,10 @@ if [ -n "$USE_PODMAN" ]; then
else
DOCKER_EXEC=$(which docker)
fi
CVW_MOUNT=${CVW_MOUNT:$(pwd)/../../}
if [ -n "$USE_PODMAN" ]; then
CVW_MOUNT=$(pwd)/../../
fi
echo ${CVW_MOUNT}
USERNAME="cad"
UBUNTU_WALLY_HASH=$(${DOCKER_EXEC} images --quiet wallysoc/ubuntu_wally)
@ -28,7 +31,7 @@ elif [ -z $TOOLCHAINS_HASH ]; then
exit 1
else
echo "Get ${TOOLCHAINS_HASH} for toolchains_wally"
${DOCKER_EXEC} run -it --rm -v ${CVW_MOUNT}:/home/${USERNAME}/cvw wallysoc/toolchains_wally
${DOCKER_EXEC} run --user root -it --rm -v ${CVW_MOUNT}:/home/${USERNAME}/cvw wallysoc/toolchains_wally
fi
echo "Successfully reach the end"

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@ -46,7 +46,6 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
logic StallE, StallM, StallW;
logic FlushD, FlushE, FlushM, FlushW;
logic TrapM, TrapW;
logic IntrF, IntrD, IntrE, IntrM, IntrW;
logic HaltM, HaltW;
logic [1:0] PrivilegeModeW;
logic [P.XLEN-1:0] rf[NUMREGS];
@ -269,13 +268,6 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
flopenrc #(1) InterruptWReg (clk, reset, 1'b0, ~StallW, InterruptM, InterruptW);
flopenrc #(1) HaltWReg (clk, reset, 1'b0, ~StallW, HaltM, HaltW);
// **** remove? are these used?
flopenrc #(1) IntrFReg (clk, reset, 1'b0, ~StallF, TrapM, IntrF);
flopenrc #(1) IntrDReg (clk, reset, FlushD, ~StallD, IntrF, IntrD);
flopenrc #(1) IntrEReg (clk, reset, FlushE, ~StallE, IntrD, IntrE);
flopenrc #(1) IntrMReg (clk, reset, FlushM, ~StallM, IntrE, IntrM);
flopenrc #(1) IntrWReg (clk, reset, FlushW, ~StallW, IntrM, IntrW);
flopenrc #(12) CSRAdrWReg (clk, reset, FlushW, ~StallW, CSRAdrM, CSRAdrW);
flopenrc #(1) CSRWriteWReg (clk, reset, FlushW, ~StallW, CSRWriteM, CSRWriteW);

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@ -168,6 +168,7 @@ module testbench;
"arch64zknd": if (P.ZKND_SUPPORTED) tests = arch64zknd;
"arch64zkne": if (P.ZKNE_SUPPORTED) tests = arch64zkne;
"arch64zknh": if (P.ZKNH_SUPPORTED) tests = arch64zknh;
"wallycov64i": tests = wallycov64i;
endcase
end else begin // RV32
case (TEST)

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@ -72,6 +72,59 @@ string tvpaths[] = '{
"pmpadrdecs"
};
string wallycov64i[] = '{
`WALLYTEST,
"rv64i_m/I/src/WALLY-COV-lh.S",
"rv64i_m/I/src/WALLY-COV-srli.S",
"rv64i_m/I/src/WALLY-COV-srai.S",
"rv64i_m/I/src/WALLY-COV-or.S",
"rv64i_m/I/src/WALLY-COV-sra.S",
"rv64i_m/I/src/WALLY-COV-sll.S",
"rv64i_m/I/src/WALLY-COV-slti.S",
"rv64i_m/I/src/WALLY-COV-bne.S",
"rv64i_m/I/src/WALLY-COV-bltu.S",
"rv64i_m/I/src/WALLY-COV-srliw.S",
"rv64i_m/I/src/WALLY-COV-slliw.S",
"rv64i_m/I/src/WALLY-COV-sw.S",
"rv64i_m/I/src/WALLY-COV-sraiw.S",
"rv64i_m/I/src/WALLY-COV-sltu.S",
"rv64i_m/I/src/WALLY-COV-addiw.S",
"rv64i_m/I/src/WALLY-COV-slli.S",
"rv64i_m/I/src/WALLY-COV-beq.S",
"rv64i_m/I/src/WALLY-COV-sd.S",
"rv64i_m/I/src/WALLY-COV-auipc.S",
"rv64i_m/I/src/WALLY-COV-bge.S",
"rv64i_m/I/src/WALLY-COV-sltiu.S",
"rv64i_m/I/src/WALLY-COV-lui.S",
"rv64i_m/I/src/WALLY-COV-lw.S",
"rv64i_m/I/src/WALLY-COV-lwu.S",
"rv64i_m/I/src/WALLY-COV-slt.S",
"rv64i_m/I/src/WALLY-COV-blt.S",
"rv64i_m/I/src/WALLY-COV-addw.S",
"rv64i_m/I/src/WALLY-COV-lb.S",
"rv64i_m/I/src/WALLY-COV-xori.S",
"rv64i_m/I/src/WALLY-COV-addi.S",
"rv64i_m/I/src/WALLY-COV-xor.S",
"rv64i_m/I/src/WALLY-COV-jal.S",
"rv64i_m/I/src/WALLY-COV-sb.S",
"rv64i_m/I/src/WALLY-COV-ld.S",
"rv64i_m/I/src/WALLY-COV-lhu.S",
"rv64i_m/I/src/WALLY-COV-andi.S",
"rv64i_m/I/src/WALLY-COV-ori.S",
"rv64i_m/I/src/WALLY-COV-sub.S",
"rv64i_m/I/src/WALLY-COV-and.S",
"rv64i_m/I/src/WALLY-COV-sh.S",
"rv64i_m/I/src/WALLY-COV-srlw.S",
"rv64i_m/I/src/WALLY-COV-sraw.S",
"rv64i_m/I/src/WALLY-COV-subw.S",
"rv64i_m/I/src/WALLY-COV-sllw.S",
"rv64i_m/I/src/WALLY-COV-jalr.S",
"rv64i_m/I/src/WALLY-COV-lbu.S",
"rv64i_m/I/src/WALLY-COV-add.S",
"rv64i_m/I/src/WALLY-COV-srl.S",
"rv64i_m/I/src/WALLY-COV-bgeu.S"
};
string buildroot[] = '{
`BUILDROOT,
"buildroot"
@ -1929,6 +1982,7 @@ string arch64zknh[] = '{
string arch32f[] = '{
`RISCVARCHTEST,
"rv32i_m/F/src/fadd_b11-01.S",
"rv32i_m/F/src/fadd_b10-01.S",
"rv32i_m/F/src/fadd_b1-01.S",
"rv32i_m/F/src/fadd_b11-01.S",
@ -2276,7 +2330,7 @@ string arch64zknh[] = '{
//`RISCVARCHTEST,
`WALLYTEST,
"rv64i_m/D_Zfa/src/fcvtmod.w.d_b1-01.S",
// "rv64i_m/D_Zfa/src/fcvtmod.w.d_b22-01.S", // temporarily excluded because Sail produces wrong signature https://github.com/riscv/sail-riscv/issues/388
"rv64i_m/D_Zfa/src/fcvtmod.w.d_b22-01.S",
"rv64i_m/D_Zfa/src/fcvtmod.w.d_b23-01.S",
"rv64i_m/D_Zfa/src/fcvtmod.w.d_b24-01.S",
"rv64i_m/D_Zfa/src/fcvtmod.w.d_b27-01.S",

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@ -9,7 +9,7 @@ current_dir = $(shell pwd)
#XLEN ?= 64
all: root arch32 wally32 arch32e arch64 wally64
wally-riscv-arch-test: root wally32 wally64
wally-riscv-arch-test: root wally64 wally32
root:
mkdir -p $(work_dir)

4
tests/testgen/Makefile Normal file
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@ -0,0 +1,4 @@
all:
./covergen.py
cd ../riscof; make wally-riscv-arch-test
cd ../../sim; make memfiles

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@ -14,134 +14,195 @@ from datetime import datetime
from random import randint
from random import seed
from random import getrandbits
from os import getenv
import re
##################################
# functions
##################################
def writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen):
rdval = randint(0, 2**xlen-1)
def shiftImm(imm, xlen):
imm = imm % xlen
return str(imm)
def signedImm12(imm):
imm = imm % pow(2, 12)
if (imm & 0x800):
imm = imm - 0x1000
return str(imm)
def writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen):
lines = "\n# Testcase " + str(desc) + "\n"
lines = lines + "li x" + str(rd) + ", MASK_XLEN(" + formatstr.format(rdval) + ") # initialize rd to a random value that should get changed\n"
lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
lines = lines + "li x" + str(rs2) + ", MASK_XLEN(" + formatstr.format(rs2val) + ") # initialize rs2 to a random value\n"
lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", x" + str(rs2) + " # perform operation\n"
lines = lines + "li x" + str(rd) + ", MASK_XLEN(" + formatstr.format(rdval) + ") # initialize rd to a random value that should get changed\n"
if (test in rtype):
lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
lines = lines + "li x" + str(rs2) + ", MASK_XLEN(" + formatstr.format(rs2val) + ") # initialize rs2 to a random value\n"
lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", x" + str(rs2) + " # perform operation\n"
elif (test in shiftitype):
lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", " + shiftImm(immval, xlen) + " # perform operation\n"
elif (test in itype):
lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", " + signedImm12(immval) + " # perform operation\n"
else:
pass
#print("Error: %s type not implemented yet" % test)
f.write(lines)
def make_cp_rd(rd, test, storecmd, xlen):
rs1 = randint(0, 31)
rs2 = randint(0, 31)
rs1val = randint(0, 2**xlen-1)
rs2val = randint(0, 2**xlen-1)
desc = "cp_rd (Test destination rd = x" + str(rd) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
def make_cp_rs1(rs1, test, storecmd, xlen):
rd = randint(0, 31)
rs2 = randint(0, 31)
rs1val = randint(0, 2**xlen-1)
rs2val = randint(0, 2**xlen-1)
desc = "cp_rs1 (Test source rs1 = x" + str(rs1) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
def make_cp_rs2(rs2, test, storecmd, xlen):
rd = randint(0, 31)
rs1 = randint(0, 31)
rs1val = randint(0, 2**xlen-1)
rs2val = randint(0, 2**xlen-1)
desc = "cp_rs2 (Test source rs2 = x" + str(rs2) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
def make_cmp_rd_rs1(r, test, storecmd, xlen):
rd = r
rs1 = r
rs2 = randint(0, 31)
rs1val = randint(0, 2**xlen-1)
rs2val = randint(0, 2**xlen-1)
desc = "cmp_rd_rs1 (Test destination rd = source rs1 = x" + str(r) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
def make_cmp_rd_rs2(r, test, storecmd, xlen):
rd = r
rs1 = randint(0, 31)
rs2 = r
rs1val = randint(0, 2**xlen-1)
rs2val = randint(0, 2**xlen-1)
desc = "cmp_rd_rs2 (Test destination rd = source rs2 = x" + str(r) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
def make_cmp_rd_rs1_rs2(r, test, storecmd, xlen):
rd = r
rs1 = r
rs2 = r
rs1val = randint(0, 2**xlen-1)
rs2val = randint(0, 2**xlen-1)
desc = "cmp_rd_rs1_rs2 (Test destination rd = source rs1 = source rs2 = x" + str(r) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
def make_cp_gpr_hazard(test, storecmd, xlen):
rs1val = randint(0, 2**xlen-1)
rs2val = randint(0, 2**xlen-1)
desc = "cp_gpr_hazard"
writeCovVector(desc, 20, 21, 22, rs1val, rs2val, test, storecmd, xlen)
lines = test + " x23, x22, x20 # RAW\n"
lines = lines + test + " x22, x23, x20 # WAR\n"
lines = lines + test + " x22, x21, x20 # WAW\n"
f.write(lines)
def make_cp_rs1_maxvals(test, storecmd, xlen):
for rs1val in [0, 2**(xlen-1), 2**(xlen-1)-1, 2**xlen-1, 1, 2**(xlen-1)+1]:
def randomize():
rs1 = randint(1, 31)
rs2 = randint(1, 31)
rd = randint(1, 31)
rs1 = randint(0, 31)
rs2 = randint(0, 31)
rs2val = randint(0, 2**xlen-1)
desc = "cp_rs1_maxvals (rs1 = " + str(rs1val) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
def make_cp_rs2_maxvals(test, storecmd, xlen):
for rs2val in [0, 2**(xlen-1), 2**(xlen-1)-1, 2**xlen-1, 1, 2**(xlen-1)+1]:
rd = randint(1, 31)
rs1 = randint(0, 31)
rs2 = randint(0, 31)
rs1val = randint(0, 2**xlen-1)
desc = "cp_rs2_maxvals (rs2 = " + str(rs2val) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen)
rs2val = randint(0, 2**xlen-1)
immval = randint(0, 2**xlen-1)
rdval = randint(0, 2**xlen-1)
return [rs1, rs2, rd, rs1val, rs2val, immval, rdval]
def make_rd(test, storecmd, xlen):
for r in range(32):
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rd (Test destination rd = x" + str(r) + ")"
writeCovVector(desc, rs1, rs2, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, test, storecmd, xlen):
rdval = randint(0, 2**xlen-1)
lines = "\n# Testcase " + str(desc) + "\n"
lines = lines + "li x" + str(rd) + ", MASK_XLEN(" + formatstr.format(rdval) + ") # initialize rd to a random value that should get changed\n"
lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
lines = lines + "li x" + str(rs2) + ", MASK_XLEN(" + formatstr.format(rs2val) + ") # initialize rs2 to a random value\n"
lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", x" + str(rs2) + " # perform operation\n"
f.write(lines)
def make_rs1(test, storecmd, xlen):
for r in range(32):
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rs1 (Test source rs1 = x" + str(r) + ")"
writeCovVector(desc, r, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def make_rs2(test, storecmd, xlen):
for r in range(32):
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rs2 (Test source rs2 = x" + str(r) + ")"
writeCovVector(desc, rs1, r, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def write_rtype_arith_vectors(test, storecmd, xlen):
def make_rd_rs1(test, storecmd, xlen):
for r in range(32):
make_cp_rd(r, test, storecmd, xlen)
[rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rd_rs1 (Test rd = rs1 = x" + str(r) + ")"
writeCovVector(desc, r, rs2, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def make_rd_rs2(test, storecmd, xlen):
for r in range(32):
make_cp_rs1(r, test, storecmd, xlen)
[rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rd_rs2 (Test rd = rs1 = x" + str(r) + ")"
writeCovVector(desc, rs1, r, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def make_rd_rs1_rs2(test, storecmd, xlen):
for r in range(32):
make_cp_rs2(r, test, storecmd, xlen)
for r in range(32):
make_cmp_rd_rs2(r, test, storecmd, xlen)
for r in range(32):
make_cmp_rd_rs1(r, test, storecmd, xlen)
for r in range(32):
make_cmp_rd_rs1_rs2(r, test, storecmd, xlen)
make_cp_gpr_hazard(test, storecmd, xlen)
make_cp_rs1_maxvals(test, storecmd, xlen)
make_cp_rs2_maxvals(test, storecmd, xlen)
[rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x" + str(r) + ")"
writeCovVector(desc, r, r, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def make_rs1_maxvals(test, storecmd, xlen):
for v in [0, 2**(xlen-1), 2**(xlen-1)-1, 2**xlen-1, 1, 2**(xlen-1)+1]:
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rs1_maxvals (Test source rs1 value = " + hex(v) + ")"
writeCovVector(desc, rs1, rs2, rd, v, rs2val, immval, rdval, test, storecmd, xlen)
def make_rs2_maxvals(test, storecmd, xlen):
for v in [0, 2**(xlen-1), 2**(xlen-1)-1, 2**xlen-1, 1, 2**(xlen-1)+1]:
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rs2_maxvals (Test source rs2 value = " + hex(v) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, v, immval, rdval, test, storecmd, xlen)
def make_rd_maxvals(test, storecmd, xlen):
for v in [0, 2**(xlen-1), 2**(xlen-1)-1, 2**xlen-1, 1, 2**(xlen-1)+1]:
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cp_rd_maxvals (Test rd value = " + hex(v) + ")"
writeCovVector(desc, rs1, 0, rd, v, rs2val, immval, rdval, test, storecmd, xlen)
def make_rd_rs1_eqval(test, storecmd, xlen):
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cmp_rdm_rs1_eqval (Test rs1 = rd = " + hex(rs1val) + ")"
writeCovVector(desc, rs1, 0, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def make_rd_rs2_eqval(test, storecmd, xlen):
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cmp_rd_rs2_eqval (Test rs2 = rd = " + hex(rs2val) + ")"
writeCovVector(desc, 0, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
def make_rs1_rs2_eqval(test, storecmd, xlen):
[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
desc = "cmp_rs1_rs2_eqval (Test rs1 = rs2 = " + hex(rs1val) + ")"
writeCovVector(desc, rs1, rs2, rd, rs1val, rs1val, immval, rdval, test, storecmd, xlen)
#def make_cp_gpr_hazard(test, storecmd, xlen):
# pass # *** to be implemented ***
def write_tests(coverpoints, test, storecmd, xlen):
for coverpoint in coverpoints:
if (coverpoint == "cp_asm_count"):
pass
elif (coverpoint == "cp_rd"):
make_rd(test, storecmd, xlen)
elif (coverpoint == "cp_rs1"):
make_rs1(test, storecmd, xlen)
elif (coverpoint == "cp_rs2"):
make_rs2(test, storecmd, xlen)
elif (coverpoint == "cp_rd_rs1"):
make_rd_rs1(test, storecmd, xlen)
elif (coverpoint == "cp_rd_rs2"):
make_rd_rs2(test, storecmd, xlen)
elif (coverpoint == "cp_rd_rs1_rs2"):
make_rd_rs1_rs2(test, storecmd, xlen)
elif (coverpoint == "cp_rs1_maxvals"):
make_rs1_maxvals(test, storecmd, xlen)
elif (coverpoint == "cp_rs2_maxvals"):
make_rs2_maxvals(test, storecmd, xlen)
elif (coverpoint == "cp_rd_maxvals"):
make_rd_maxvals(test, storecmd, xlen)
elif (coverpoint == "cmp_rd_rs1_eqval"):
make_rd_rs1_eqval(test, storecmd, xlen)
elif (coverpoint == "cmp_rd_rs2_eqval"):
make_rd_rs2_eqval(test, storecmd, xlen)
elif (coverpoint == "cmp_rs1_rs2_eqval"):
make_rs1_rs2_eqval(test, storecmd, xlen)
# elif (coverpoint == "cp_gpr_hazard"):
# make_cp_gpr_hazard(test, storecmd, xlen)
else:
print("Error: " + coverpoint + " not implemented yet for " + test)
def getcovergroups(coverdefdir, coverfiles):
coverpoints = {}
curinstr = ""
for coverfile in coverfiles:
coverfile = coverdefdir + "/" + coverfile + "_coverage.svh"
f = open(coverfile, "r")
for line in f:
m = re.search(r'cp_asm_count.*\"(.*)"', line)
if (m):
# if (curinstr != ""):
# print(curinstr + ": " + str(coverpoints[curinstr]))
curinstr = m.group(1)
coverpoints[curinstr] = []
m = re.search("\s*(\S+) :", line)
if (m):
coverpoints[curinstr].append(m.group(1))
f.close()
return coverpoints
##################################
# main body
##################################
# change these to suite your tests
rtests = ["ADD", "SUB", "SLT", "SLTU", "XOR"]
tests = rtests
riscv = getenv("RISCV")
coverdefdir = riscv+"/ImperasDV-OpenHW/Imperas/ImpProprietary/source/host/riscvISACOV/source/coverage";
#coverfiles = ["RV64I", "RV64M", "RV64A", "RV64C", "RV64F", "RV64D"] # add more later
coverfiles = ["RV64I"] # add more later
rtype = ["add", "sub", "sll", "slt", "sltu", "xor", "srl", "sra", "or", "and",
"addw", "subw", "sllw", "srlw", "sraw"
"mul", "mulh", "mulhsu", "mulhu", "div", "divu", "rem", "remu",
"mulw", "divw", "divuw", "remw", "remuw"]
loaditype = ["lb", "lh", "lw", "ld", "lbu", "lhu", "lwu"]
shiftitype = ["slli", "srli", "srai"]
itype = ["addi", "slti", "sltiu", "xori", "ori", "andi"]
stypes = ["sb", "sh", "sw", "sd"]
btypes = ["beq", "bne", "blt", "bge", "bltu", "bgeu"]
coverpoints = getcovergroups(coverdefdir, coverfiles)
author = "David_Harris@hmc.edu"
xlens = [64]
numrand = 3
@ -160,7 +221,8 @@ for xlen in xlens:
else:
storecmd = "sd"
wordsize = 8
for test in tests:
for test in coverpoints.keys():
# for test in tests:
# corners = [0, 1, 2, 0xFF, 0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1,
# 2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1]
corners = [0, 1, 2**(xlen)-1]
@ -184,11 +246,12 @@ for xlen in xlens:
# print directed and random test vectors
# Coverage for R-type arithmetic instructions
if (test not in rtests):
exit("Error: %s not implemented yet" % test)
else:
write_rtype_arith_vectors(test, storecmd, xlen)
#if (test not in rtests):
# exit("Error: %s not implemented yet" % test)
#else:
# write_rtype_arith_vectors(test, storecmd, xlen)
write_tests(coverpoints[test], test, storecmd, xlen)
# print footer
line = "\n.EQU NUMTESTS," + str(1) + "\n\n"
f.write(line)

View File

@ -16,3 +16,6 @@ RVTEST_CODE_BEGIN
RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",temp)
la x6, wally_signature
sd x0, 0(x6)