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1902 Commits

Author SHA1 Message Date
David Harris
dc526c92bd Removed unused signals 2023-01-07 06:06:54 -08:00
David Harris
01525399cc Removed unused signals; added check for atomic in pmachecker 2023-01-07 05:59:56 -08:00
David Harris
21b9f50851 Remove conditional from inside decompress module 2023-01-07 05:51:47 -08:00
David Harris
8506f120e1 Remove unused signals 2023-01-07 05:46:22 -08:00
David Harris
44352ced64 Branch logic simplification and remove unused signals 2023-01-07 05:42:34 -08:00
David Harris
d8f0425467 vclean working; started removing unused signals 2023-01-07 05:34:58 -08:00
David Harris
f4cb652a00 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-07 04:49:40 -08:00
David Harris
2188ff879b code cleanup 2023-01-07 04:49:25 -08:00
Ross Thompson
f119b492bb Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-06 15:18:13 -06:00
Ross Thompson
7223d1e05c Added python script to post process performance counter metrics. 2023-01-06 15:15:54 -06:00
Katherine Parry
1bcb1725f5 renamed alot of signals in fpu 2023-01-06 10:35:23 -06:00
David Harris
c260354817 Removed unused UARCH configuration entries 2023-01-06 05:11:14 -08:00
Ross Thompson
01d4e942d0 Added more missing files. 2023-01-06 00:12:08 -06:00
Ross Thompson
8a5916ce66 Addd missing file. 2023-01-06 00:09:18 -06:00
Ross Thompson
09bb733088 Added code to print out performance counters at end of each test. 2023-01-05 18:00:11 -06:00
Ross Thompson
78e441fb38 More branch predictor cleanup. 2023-01-05 17:19:27 -06:00
Ross Thompson
65dd86b726 Keep around the old gshare. 2023-01-05 15:55:46 -06:00
Ross Thompson
2224679694 Added speculative gshare. 2023-01-05 14:18:00 -06:00
Ross Thompson
9d03109f34 Officially added global history with speculation to types of branch predictors. 2023-01-05 14:04:09 -06:00
Ross Thompson
0737efc86c More branch predictor cleanup. 2023-01-05 13:36:51 -06:00
Ross Thompson
808c106504 Two bit predictor cleanup. 2023-01-05 13:27:22 -06:00
Ross Thompson
14ebf2360d Simplified gshare. 2023-01-04 23:51:09 -06:00
Ross Thompson
0eceeeeeaa Simiplified global history branch predictor. 2023-01-04 23:41:55 -06:00
davidharrishmc
4a2ed0142f
Update decompress.sv 
typo
 2023-01-04 17:01:26 -08:00
Katherine Parry
970318f881 forgot the normshift module 2023-01-04 10:48:19 -06:00
Katherine Parry
95a1ddd636 some commenting fixes, converter optimizations, and moves normshift into postproc 2023-01-03 15:55:30 -06:00
David Harris
43f45c62a6 Made Q4.k interface to fgen2/4 consistent 2023-01-01 15:06:32 -08:00
David Harris
3d5acc7c2a Simplified intdiv selection logic to muxes 2023-01-01 14:04:37 -08:00
David Harris
f8af51e07b Handle special case Int Div/Rem of |A| < |B| in a single cycle 2023-01-01 13:54:01 -08:00
David Harris
f567577ede Fixed radix 2 k = 1 lint 2022-12-31 07:01:50 -08:00
David Harris
c1689b54bb Fixed backward mux in fdivsqrtstage2 2022-12-31 06:55:20 -08:00
David Harris
7c7d40ad63 Broken commit starting to address radix 2 issues 2022-12-31 06:19:15 -08:00
David Harris
50af122909 Moved shared config so wally-shared only has values a user would alter 2022-12-31 05:51:42 -08:00
David Harris
3ac62c74c2 fdivsqrt post processing cleanup 2022-12-31 05:45:15 -08:00
David Harris
99b244c8c4 fdivsqrt post processing major simplification 2022-12-31 05:42:51 -08:00
David Harris
f587933fb5 fdivsqrt post processing simplification 2022-12-31 05:37:48 -08:00
David Harris
5edc925dff fdivsqrt post processing simplification 2022-12-31 05:36:09 -08:00
David Harris
6832b9d9f6 config file, comment, postproc cleanup 2022-12-31 05:20:56 -08:00
Cedar Turek
0836d4d4f0 removed unnecessary values from shared config. unbroke division 2022-12-30 21:26:55 -08:00
Cedar Turek
e994f26d6d simplified initU and UM logic, separated radix2/4 logic 2022-12-30 18:57:07 -08:00
Cedar Turek
fb9a0c797f various formatting fixes and comments 2022-12-30 18:41:40 -08:00
Cedar Turek
286e43807a added mux to intdiv result 2022-12-30 18:06:35 -08:00
Cedar Turek
ae447e42df removed unnecessary mdue gating 2022-12-30 17:53:06 -08:00
Cedar Turek
ba90d868db took out broken muxes 2022-12-30 15:13:52 -08:00
Cedar Turek
545a3ff363 various cleanup 2022-12-30 14:31:23 -08:00
Cedar Turek
3170130c94 Code cleanup 2022-12-30 14:13:33 -08:00
Ross Thompson
9d5213b71e Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2022-12-30 15:04:54 -06:00
Ross Thompson
a538d4316f Cleanup spill logic. 2022-12-30 14:59:51 -06:00
Ross Thompson
fdd7b68501 Signal renames for PC*NextF and SelSpillNextF. 2022-12-30 14:21:20 -06:00
Cedar Turek
158e23b5a5 commented complicated step/right shift calc 2022-12-30 12:03:10 -08:00
Cedar Turek
eef1d4dd66 comment cleaning 2022-12-30 11:11:34 -08:00
Cedar Turek
7e5cafeda3 Described internal signals of fdivsqrt top 2022-12-30 11:01:02 -08:00
Cedar Turek
8cb4a7a69a Commented fdivsqrt module 2022-12-30 10:52:25 -08:00
Ross Thompson
ed536dd142 Removed da page fault from spill logic. 2022-12-30 12:51:56 -06:00
Cedar Turek
3115df9380 Begin commenting divsqrt 2022-12-30 10:43:02 -08:00
Ross Thompson
80a135f101 Spill only occurs on 32-bit instructions. 2022-12-30 12:41:25 -06:00
Katherine Parry
aca6f0d4e6 removed ethe second bit from fma alignment shift 2022-12-30 12:07:44 -06:00
Ross Thompson
b1f68a1d85 Modified IROM to return the correct offset when unaligned. 2022-12-30 11:48:40 -06:00
Katherine Parry
5844a596a3 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-12-30 09:56:35 -06:00
David Harris
58218dbdd1 continued simplifying integer division special cases 2022-12-30 07:40:28 -08:00
David Harris
bd16fd79d4 started simplifying integer division special cases 2022-12-30 07:34:26 -08:00
David Harris
30dc45c764 removed duplicate quotient mux 2022-12-30 07:17:38 -08:00
David Harris
61230c967c simplified sign handling mux 2022-12-30 07:10:47 -08:00
David Harris
ba976d66e4 Radix 4 divsqrt 2022-12-30 07:01:44 -08:00
David Harris
3c475455d9 Clean up sqrt preproc 2022-12-30 07:00:48 -08:00
David Harris
4fb8396867 Clean up sqrt initialization mux 2022-12-30 06:55:20 -08:00
David Harris
dba3ffe767 Reduced size of preproc right shift 2022-12-30 06:47:40 -08:00
David Harris
0e9bd5dab5 fdivsqrtpreproc shift simplification 2022-12-30 06:45:51 -08:00
David Harris
e9b314f902 fdiv cleanup, reduce number of rv32f fma_b15 tests being run to speed up regression 2022-12-30 06:40:25 -08:00
David Harris
ef37070eee Fixed register timing failure on SpecialCaseM in fdivsqrt 2022-12-29 21:09:23 -08:00
Ross Thompson
872ff619e3 Fixed problems with changes to ram2p. 2022-12-29 17:13:48 -06:00
Ross Thompson
c725b5534a Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2022-12-29 17:07:53 -06:00
Ross Thompson
654b10894c Re-enabled the branch predictor in rv64gc. 2022-12-29 17:07:50 -06:00
Katherine Parry
90eb4fc1f1 minor optimizations and renaming 2022-12-29 15:54:17 -06:00
Katherine Parry
89e8df084a Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-12-29 12:37:51 -06:00
David Harris
776f4714af Clean up names and comments in divsqrt 2022-12-29 08:02:44 -08:00
David Harris
6664cb9db4 Factored out hardware unique to RV64 and to IDIV 2022-12-29 07:36:26 -08:00
Katherine Parry
1b4fa38510 one bitt removed from inital lignment shift 2022-12-28 17:46:53 -06:00
Alessandro Maiuolo
7c19665dea added script in pipelined folder to run regressions with all radix/copies configurations 2022-12-28 07:32:35 -08:00
David Harris
7780b44973 fdivsqrtfsm conditional on IDIV (fixed typo) 2022-12-27 22:16:48 -08:00
David Harris
5ee44b7405 fdivsqrtfsm conditional on IDIV 2022-12-27 22:15:45 -08:00
David Harris
db933aa7e2 fdivsqrtfsm conditional on IDIV 2022-12-27 22:14:09 -08:00
Cedar Turek
ef360f0539 idiv passing radix 2, four copies 2022-12-27 22:11:18 -08:00
Cedar Turek
4ed2c6255c idiv passing radix 2, four copies 2022-12-27 22:10:48 -08:00
David Harris
9964fc9ebe Moved IDIV in fdivsqrtfms into generate block 2022-12-27 22:04:50 -08:00
David Harris
a832605658 Moved IDIV for postproc into generate block 2022-12-27 22:02:14 -08:00
David Harris
d59878a886 Moved IDIV_ON_FP into conditional block in fdivsqrtpreproc 2022-12-27 21:53:00 -08:00
Cedar Turek
a559abe554 Fixed cycles for multiple iterations. 2-copies radix 2 passing regression. 2022-12-27 21:34:27 -08:00
David Harris
665b545fd0 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-12-27 21:30:13 -08:00
David Harris
87abed6722 cleanup 2022-12-27 21:29:36 -08:00
David Harris
6cf73cdaee Fixed floating Sqrt signal when floating point is disabled, causing REMU tohang during buildroot around 3.2M 2022-12-27 21:24:38 -08:00
David Harris
c08811357c Renamed muldiv to mdu 2022-12-27 19:57:10 -08:00
Ross Thompson
a129e27502 signal name changes in ram2p. 2022-12-27 15:07:01 -06:00
Ross Thompson
66b2fbd836 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2022-12-27 15:06:25 -06:00
Ross Thompson
3f4b3a4159 Added about moving decompressed config generate. 2022-12-27 15:04:55 -06:00
David Harris
dfc0b5d1ad Removed MDUE from unnecessary places in fdivsqrt 2022-12-27 10:42:40 -08:00
David Harris
4850d058b2 fdiv typo 2022-12-27 10:30:42 -08:00
David Harris
acc9498ae2 Made SqrtE only true on square root so gating with ~MDUE can be removed) 2022-12-27 10:27:07 -08:00
David Harris
e34b8139af Check for non-negative W in int sign handling 2022-12-27 06:35:17 -08:00
Cedar Turek
f48b7d7ef9 fpu idiv working on all configs with 1 copy of radix 2! 2022-12-26 23:18:28 -08:00