Jordan Carlin
ef778da98d
Eliminate more logical operators and replace with bitwise
2024-05-15 10:50:23 -07:00
Jordan Carlin
4ffce9a752
Switch riscvassertions to use bitwise operators instead of logical operators per Wally style guide
2024-05-15 09:23:24 -07:00
Rose Thompson
e295454948
Merge pull request #798 from jordancarlin/newConfig
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Update config to derive MISA from macros and update MISA bits based on the spec
2024-05-15 10:28:44 -05:00
Jordan Carlin
291d1e62d5
M implies Zmmul
2024-05-14 19:38:34 -07:00
Jordan Carlin
4a72922087
update config to derive MISA from macros
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- Remove C_SUPPORTED and update decompress unit based on Zc* extensions
- Derive A_SUPPORTED from A subextensions
- Derive B_SUPPORTED from B subextensions
- Derive C_SUPPORTED from C subextensions
2024-05-14 06:49:18 -07:00
David Harris
175c18da01
Parameterized FMA. However, some offsets are not parameterized. See PR #793 for list of changes
2024-05-13 15:16:00 -07:00
David Harris
d4ac53f000
commented legal TEST options
2024-05-13 07:22:30 -07:00
David Harris
75c10bddfa
Moved case.sh to tests/fp
2024-05-13 07:12:16 -07:00
David Harris
d0dad1d9f6
Fixed testbench_fp to use modified unpacker
2024-05-12 12:11:48 -07:00
David Harris
380d88fc68
Merged config-shared after fma fix
2024-05-12 11:10:55 -07:00
David Harris
009d251433
Fixed cvtint bug by adding 2 bits to convert width; initial implementation of fround passes basic regression but fails some nightly regression cases
2024-05-11 22:32:51 -07:00
David Harris
c0743a1fcf
Added missing convert F to/from Int64 tests for arch64f
2024-05-11 02:29:47 -07:00
Katherine Parry
807ef44772
fixed fma testfloat issue #578
2024-05-10 18:12:11 -07:00
Rose Thompson
ceb31fec68
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-05-10 08:54:23 -05:00
Rose Thompson
b027fa44ef
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-05-10 08:53:00 -05:00
Rose Thompson
4bd5d334df
Modified testbench so it instantiates the function logger if DEBUG is greater than 0 rather than just 1.
2024-05-10 08:51:59 -05:00
David Harris
66b33c09be
Added Zaamo and Zalrsc support to testbench and regression
2024-05-10 05:41:00 -07:00
David Harris
54750ae4d5
Fixed out-of-bound vector accesses in testbench_fp when FLEN < Q_LEN
2024-05-09 19:52:37 -07:00
David Harris
bdd0043cd1
Testbench terminates buildroot sim at instruction limit
2024-05-09 07:58:53 -07:00
David Harris
47af54b131
Fixed buildroot prematurely terminating in VCS
2024-05-09 07:29:45 -07:00
David Harris
0d1d59a3d8
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2024-05-08 18:58:01 -07:00
Divya2030
31ae18922b
regression_wally vcs run works
2024-05-08 04:25:03 -07:00
David Harris
77137f0f60
ZAAMO and ZALRSC implemented but not tested
2024-05-07 16:45:49 -07:00
Divya2030
a3f1a274d2
VCS Simulation Passed
2024-05-07 10:41:02 -07:00
David Harris
06d3591a15
Divy's change for VCS signature checking
2024-05-04 02:45:43 -07:00
Divya2030
12a9c0ebd6
pmp coverage
2024-05-02 11:53:32 -07:00
Divya2030
ee566aa856
pmp coverage
2024-05-02 11:53:04 -07:00
Divya2030
7a5eac963e
Revert "pmp functional coverage basic"
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This reverts commit db2b07b05d
2024-05-02 11:43:33 -07:00
Divya2030
3853f94337
Revert "initial commit pmp basic coverage working"
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This reverts commit 7ca1c976c0
2024-05-02 11:23:59 -07:00
Divya2030
9f27f3fe28
Merge branch 'main' of github.com:Divya2030/cvw
2024-05-02 11:21:05 -07:00
Divya2030
db2b07b05d
pmp functional coverage basic
2024-05-02 11:20:03 -07:00
Divya2030
694c69c651
Merge branch 'openhwgroup:main' into main
2024-05-02 10:34:15 -07:00
Divya2030
7ca1c976c0
initial commit pmp basic coverage working
2024-05-02 10:33:29 -07:00
David Harris
e667adf946
Added covergen directed coverage generator
2024-05-01 14:47:37 -07:00
David Harris
9b22275438
Removed unused signals from WallyTracer
2024-04-30 08:54:28 -07:00
David Harris
fc7c183d56
Added fcvtmod.w.d_b22 to regression now that it works in Sail
2024-04-29 17:52:21 -07:00
David Harris
160c11d786
Integrating riscv-dv coverage
2024-04-24 10:17:49 -07:00
David Harris
6415bfc3c2
Code and testbench cleanup
2024-04-23 10:17:44 -07:00
David Harris
f9eec8c43f
Merged wsim changes
2024-04-22 13:11:35 -07:00
Kunlin Han
9be0303493
Add support for dumping vcd.
2024-04-22 13:03:51 -07:00
David Harris
26711083df
Flushing uart.out file to observe progress
2024-04-21 20:08:35 -07:00
David Harris
03f49dea3f
regression printing improvements
2024-04-21 19:45:09 -07:00
David Harris
be15a11622
Fixed conflicts on getenv
2024-04-21 08:38:13 -07:00
David Harris
00a1c0fc57
Fixed WALLY/RISCV paths in testbench/rom1p1r; search log files for warnings and errors
2024-04-21 00:02:15 -07:00
David Harris
1817ab2e11
testbench import is happy now for Questa, but throws lint warning for VCS
2024-04-20 23:13:13 -07:00
David Harris
fd6a6b2249
environment variable cleanup
2024-04-20 22:52:08 -07:00
David Harris
a1876b1e7c
script cleanup
2024-04-20 17:22:31 -07:00
David Harris
338f37b570
Moved getenv/getenvval declaration to config-shared so lint and regression both run
2024-04-20 17:19:42 -07:00
David Harris
571b67f565
Merging PR738
2024-04-20 17:15:17 -07:00
slmnemo
f0229e970b
Fixed getenvvar verilator bug in rom1p1r, Removed unused system function from testbench.
2024-04-20 17:07:54 -07:00
slmnemo
66a002d879
Removed unused rmCmd string declaration
2024-04-20 16:58:23 -07:00
slmnemo
354d447269
Changed testbench to use fopen instead of opening and closing uartfile whenever writing
2024-04-20 16:56:54 -07:00
David Harris
d9ebfdfc4f
Enabled Zcb tests
2024-04-20 13:16:54 -07:00
Quswar Abid
1b18568d87
the fix Rose provided in meeting
2024-04-17 09:39:21 -07:00
Kunlin Han
29c19d9cb4
Add system function through DPI to avoid missing support in Verilator.
2024-04-16 11:23:00 -07:00
Rose Thompson
1eb1beed95
Fixed merge conflict bug in the last pull request.
2024-04-16 10:32:24 -05:00
Rose Thompson
9fe86712d8
Merge branch 'main' into wsim_verilator
2024-04-16 09:07:50 -05:00
David Harris
160162c98a
Merge pull request #728 from Karl-Han/verilator_getenv
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Add support for getenvval as wrapper for Verilator's getenv
2024-04-15 17:55:34 -06:00
slmnemo
39ae26a897
Added documentation for known Verilator hierarchy bug
2024-04-15 15:58:09 -07:00
slmnemo
4b80457f3e
Fixed issue with Verilator hierarchical referencing by changing module names, moved run-imperas-linux to correct directory
2024-04-12 21:58:20 -07:00
slmnemo
342c99d6ea
Rearranged uart_logger block to only generate if UART is supported
2024-04-12 21:30:33 -07:00
Kunlin Han
eeb5c59143
Remove unnecessary sig and avoid uninitialized signal inside always block.
2024-04-12 16:06:10 -07:00
Kunlin Han
4d9de94029
Add support for getenvval as wrapper for Verilator's getenv.
2024-04-12 14:59:04 -07:00
David Harris
60e70c1986
Fixed testbench-fp replication length for regression-wally --testfloat. Changed regression-wally to expect -- in named arguments.
2024-04-08 05:57:18 -07:00
David Harris
d182a2925e
Fixed bug in testbench_fp for XLEN > FLEN
2024-04-07 05:40:18 -07:00
Rose Thompson
bb072fba84
Fixed the buildroot issue.
2024-04-06 18:25:53 -05:00
Rose Thompson
46fdfde7ec
Removed unnecessary display from testbench.
2024-04-06 16:10:18 -05:00
Rose Thompson
8885c32f7c
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-04-06 15:55:00 -05:00
David Harris
e8111da88a
Removed unused old regression-wally
2024-04-06 13:47:44 -07:00
David Harris
6b844a2e6e
Added GUI support and removed unused wave files
2024-04-06 13:43:06 -07:00
David Harris
3c855e3e90
Passing arguments to buildroot, not yet checking result correctly
2024-04-06 11:42:41 -07:00
David Harris
b3f007ec7f
Working on buildroot in regression
2024-04-06 11:11:22 -07:00
David Harris
ac9a21873d
Pass TEST to testbench with +TEST=<name> rather than -G TEST=<name> so that we don't have to recompile for every new test
2024-04-06 10:34:21 -07:00
David Harris
9ee7544d3c
TestFloat running; normal testbench broken
2024-04-06 09:28:07 -07:00
David Harris
4b19f6d542
testfloat running through wsim; moved lint, regression, wsim to bin directory so we don't need ./
2024-04-06 08:22:39 -07:00
slmnemo
d107a42e8c
Replaced rewrite command with system rm command for uart file. Fixed comment on line 573
2024-04-05 21:39:41 -07:00
slmnemo
2fcae601a9
Replaced funky rewrite call with file removal
2024-04-05 20:59:08 -07:00
David Harris
7b56809323
wsim runs a Questa sim
2024-04-05 19:08:14 -07:00
slmnemo
3ee25c8936
Merged testbench changes
2024-04-05 17:20:03 -07:00
slmnemo
5378b61eb2
Added UART output file buildroot_uart.out for Linux test 'buildroot'.
2024-04-05 17:18:03 -07:00
Rose Thompson
23e51e7277
starting on functional coverage for fence.i.
2024-04-04 15:44:57 -05:00
David Harris
ccd0e9cd0c
Clean up testbench-fp for Verilator
2024-04-03 17:26:41 -07:00
David Harris
ae8d581f4e
Started implementing Verilator for testfloat
2024-04-03 17:09:19 -07:00
Divya2030
aa6eacbce5
Merge branch 'openhwgroup:main' into main
2024-04-03 10:40:30 -07:00
Divya2030
135f3b6f8f
vcs testbench
2024-04-03 10:39:02 -07:00
David Harris
8755966f50
Incorporated Kunlin's Verilator hack so testbench runs 110x faster. Isolated within ifdef VERILATOR to make it easier to remove when Verilator issue 4967 is resolved
2024-04-03 07:23:02 -07:00
David Harris
8741b01818
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2024-04-03 06:51:24 -07:00
David Harris
929eb0430c
Testbench uses posedge control signals to speed up Verilator
2024-04-03 06:51:18 -07:00
Rose Thompson
c11d7ea55e
Fixed bug in the testbench which did not allow external memory to work correctly.
2024-04-01 10:59:40 -05:00
Rose Thompson
4a7c16990f
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-03-28 13:45:12 -05:00
Rose Thompson
35eba468f7
Removed unused testbench-xcelium.sv.
2024-03-28 13:43:26 -05:00
Rose Thompson
b87cdd49a3
Merge pull request #690 from davidharrishmc/dev
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fcvt.h.l fixes, removed delays
2024-03-28 13:42:41 -05:00
Rose Thompson
081cf5be55
Fixed the CacheHit logger bug.
2024-03-28 13:40:01 -05:00
David Harris
4eb7de7381
Removed Zfh tests from wally-riscv-arch-test now that they are available in riscv-arch-test
2024-03-26 13:58:59 -07:00
David Harris
0caab3c0c9
Removed delays from cacheLRU and testbench
2024-03-25 12:20:25 -07:00
David Harris
690338b758
Incorporated fixed fcvt.h.l* instructions; they now run in the testbench
2024-03-25 06:08:27 -07:00
Jordan Carlin
d580d7af5d
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-03-23 17:56:23 -07:00
Jordan Carlin
fd97108dc3
Update testbench-fp to support Zfa in FPU modules
2024-03-23 17:55:59 -07:00
David Harris
bae52cf13d
Merge pull request #678 from Karl-Han/latest
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[Resolved Conflict] Remove all #delay from non-testbench
2024-03-23 15:18:04 -07:00
Kunlin Han
22b59138f0
Remove all #delay from non-testbench.
2024-03-16 11:20:32 -07:00
