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387 Commits

Author SHA1 Message Date
David Harris
0abfe5cb55 Fixed some lint errors in derived configs 2024-01-31 11:39:59 -08:00
David Harris
bf7e20e846 IEEE754 derivatives for testfloat 2024-01-30 09:49:27 -08:00
David Harris
3db5b6d9a9 Fix FLI to support quads 2024-01-29 14:51:21 -08:00
David Harris
32c102d89a All deriv tests generated, use sim/make deriv 2024-01-29 14:34:42 -08:00
David Harris
45e2317636 Added Wally github address to header comments 2024-01-29 05:38:11 -08:00
David Harris
e8dde265be More coverage: CacheWay 2024-01-26 16:14:36 -08:00
David Harris
3620a10c0b Improved hptw and I CacheWays coverage 2024-01-26 14:55:51 -08:00
David Harris
1c1d3eb956 HPTW coverage improvements 2024-01-26 10:46:38 -08:00
David Harris
d2f645819d Added override to fix issue 582 menvcfg.FIOM writability; restored PMA for uncore RAM affecting AMO operations 2024-01-24 06:46:14 -08:00
David Harris
66a1edb261 More coverage touchup 2024-01-23 23:11:49 -08:00
David Harris
7215f48dda coverage improvements: fixing problems running ImperasDV on coverage tests 2024-01-23 22:21:01 -08:00
David Harris
d5f497eec5 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-01-22 09:56:50 -08:00
Jordan Carlin
0c13e14bbf coverage improvements for mret when mpp = 3; update imperas config 2024-01-22 09:52:58 -08:00
David Harris
4ffa5e7b0a Coverage improvements 2024-01-22 09:49:24 -08:00
David Harris
171430a695 FPU and PMP tests 2024-01-21 14:41:22 -08:00
David Harris
9d4a14b209 coverage improvements 2024-01-21 11:39:51 -08:00
David Harris
69218b4b86 Coverage improvements 2024-01-21 10:03:07 -08:00
David Harris
9260d3c424 Add Zfh support to imperas.ic, use Zicond in riscof now that it is fixed in riscv-arch-test 2024-01-18 22:46:07 -08:00
David Harris
eb8ab3fae2 EBU coverage exclusion 2024-01-18 21:30:59 -08:00
David Harris
9eb6d9c8b8 Added Zicond support 2024-01-11 07:37:15 -08:00
David Harris
d93684be21 Verilate running (slowly) 2024-01-07 21:30:33 -08:00
David Harris
7fe62b0c19 Fixed outdated IMMU exclusions 2024-01-06 08:01:58 -08:00
David Harris
6bcd039ef1 DTIM exclusion in LSU; added atomic tests to coverage regression 2024-01-06 07:44:58 -08:00
David Harris
67124b0c7f Fixed typo in declaration in tlbcontrol; escape quoted argument to Verilator; added ulimit to setup so Verilator stack is large enough 2024-01-06 07:11:25 -08:00
David Harris
0781cd4a44 Improved tlbcontrol to fault on R=0,W=1; fixed more coverage testsin tlbmisc.S; changed integer type to try to speed up CoreMark; comments in Verilate 2024-01-05 22:45:15 -08:00
David Harris
ed623f1a71 Fixed unsupported riscof YAML string; preparing for Verilator -G testcase 2024-01-05 20:06:21 -08:00
Rose Thompson
edc56c669e Fixed bug 546. non-leaf non-zero PBMT bit raise page fault. 2024-01-05 17:10:14 -06:00
David Harris
66dce731a0 Fixed wave file after signal name changes 2024-01-01 18:33:47 -08:00
David Harris
f4ee05e1ea Coverage improvements 2024-01-01 08:31:09 -08:00
David Harris
c52aef86a6 Fixed coverage exclusions that no longer reference code properly 2023-12-31 20:35:08 -08:00
David Harris
8795a9db7a Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-12-31 20:26:47 -08:00
David Harris
17cbdb53df Progress on Verilator simulation. Full adder compiles and runs. Wally builds. 2023-12-31 09:53:13 -08:00
Rose Thompson
f59fa5089d Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-12-29 15:13:18 -06:00
Rose Thompson
bd0672f074
Merge branch 'main' into dev 2023-12-29 13:11:43 -08:00
Rose Thompson
8030b7d100 Added partial code for uncached amo operations. 
Minor fix for Makefile so coverage tests build.
 2023-12-29 15:07:20 -06:00
Jordan Carlin
2fa243c46e fixed coverage exclusions in lsu and ifu 2023-12-29 11:18:23 -08:00
David Harris
7f31a031bc Temporarily removed zicboz and zcb tests from regression until they work 2023-12-25 06:02:28 -08:00
David Harris
c1ad6602a3 Added commented out B extension MISA to imperas.ic; not yet working 2023-12-21 11:04:41 -08:00
David Harris
9ced88c55c Fixed tlbNAPOT test to run and makefile to gather coverage stats 2023-12-20 21:45:14 -08:00
David Harris
8552369687 Merged PR538, delete unused tests 2023-12-20 13:30:31 -08:00
David Harris
4186b604e0 Updated imperas.ic to throw misalignment faults on uncachable memory regions 2023-12-19 12:53:21 -08:00
Rose Thompson
4f59bd492d Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-12-19 12:06:04 -06:00
Rose Thompson
74238defc3 Progress. 2023-12-18 20:23:19 -06:00
David Harris
38f4d9baf8 Use riscv-arch-test arch32e instead of outdated wally-riscv-arch-test wally32e 2023-12-15 05:05:53 -08:00
David Harris
29f57958a9 Fixed WALLY-lrsc in ImperasDV by setting reservation set size to native word size and adjusting imperas.ic lr_sc_grain=8 to match 2023-12-14 15:32:36 -08:00
David Harris
8eea2bdcc0
Merge pull request #531 from ross144/main 
Updated wavefile
 2023-12-14 14:52:31 -08:00
Rose Thompson
bb712d6860 Updated wavefile. 2023-12-14 14:36:23 -06:00
Rose Thompson
53bf68a585
Merge pull request #528 from davidharrishmc/dev 
Svnapot bug fix
 2023-12-13 21:30:47 -08:00
David Harris
68d49c37db Changed PMA settings in imperas.ic so that peripherals require aligned accesses. This fixes WALLY-trap in ImperasDV. 2023-12-13 20:49:26 -08:00
David Harris
166c98b6f6 Fixed issue 526 about WALLY-mmu-sv39-svadu-svnapot-svpbmt not checking ppn for NAPOT pages. Improved test case to check normal and malformed ppn 2023-12-13 19:43:17 -08:00
Rose Thompson
9f4c32d49c Merge branch 'main' of github.com:ross144/cvw 2023-12-13 20:32:59 -06:00
Rose Thompson
e089b421bb Got it working for the cache. 2023-12-13 20:24:46 -06:00
Rose Thompson
f592baa741 Closer. 2023-12-13 18:15:32 -06:00
Rose Thompson
eeced05f33 More progress towards store delay reduction. 2023-12-13 15:56:29 -06:00
Rose Thompson
f3d43a7713 Progress on reducing store stall in d cache. 2023-12-13 15:34:21 -06:00
David Harris
6c017141c5 Renamed HADE to ADUE for Svadu 2023-12-13 11:49:04 -08:00
Rose Thompson
b2d640d245 Merge branch 'main' of github.com:ross144/cvw 2023-12-04 00:00:56 -06:00
Rose Thompson
8933aef357 Reduced imperas linux run time to 10 seconds. 2023-12-04 00:00:26 -06:00
Rose Thompson
d918791a60 Fixed bug in the wally do script. 2023-11-27 01:26:49 -06:00
Rose Thompson
35a7b2bd24 Last little hickups out of the branch predictor results parsing. 2023-11-27 00:35:22 -06:00
Rose Thompson
3dfca61c3f Changes to support concurrent simulation of all the branch predictor sweeps. 2023-11-26 22:19:34 -06:00
Rose Thompson
d8f098013c Merge pull request #506 from davidharrishmc/dev 
Cleanup
 2023-11-24 08:45:15 -08:00
David Harris
bcc20c6bd5 Merge pull request #505 from stineje/main 
Update fix for cvtint testbench-fp
 2023-11-23 20:43:00 -08:00
David Harris
3df4c13daa Updated wallyTracer for Linux boot and wally-batch.do to remove buildroot checkpoint support 2023-11-23 20:36:45 -08:00
James E. Stine
1ab7522064 Update fix for cvtint testbench-fp 2023-11-23 17:56:51 -06:00
David Harris
d509644fa6 merged pr 2023-11-21 21:54:33 -08:00
David Harris
d1bb5c7512 Imperas fix for satp modes supported 2023-11-21 21:52:11 -08:00
Rose Thompson
8233ca999f Changed buildroot to run for 1M instructions only. 2023-11-21 23:46:45 -06:00
Rose Thompson
2767c8b410 Updated imperas.ic to support just sv48 and sv39. 2023-11-21 23:24:16 -06:00
David Harris
6bec559ba6 Removed stale signals from wave.do 2023-11-21 19:49:14 -08:00
Rose Thompson
e5b7301ffe Updated imperad dv vendor id and architecture id config. 2023-11-21 15:14:17 -06:00
Rose Thompson
b137759b45 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-11-20 10:34:36 -06:00
Rose Thompson
3594c08d4b Modified linux imperas tests to 
1. enable zicclsm
2. enable logging at 7000 ms
 2023-11-20 10:30:35 -06:00
David Harris
70c58a8ce1 Merge pull request #484 from ross144/main 
Changed bpred-sim.py to only simulate 12 jobs at once.
 2023-11-17 13:26:24 -08:00
Rose Thompson
8cf2c404bf bpred-sim only simulates 12 jobs at once. 2023-11-17 15:21:58 -06:00
David Harris
94201e993f Merge pull request #481 from ross144/main 
Fixed the BTB logger so sim_bp correctly reports BTB performance
 2023-11-15 17:45:38 -08:00
Rose Thompson
9a90c15f37 Extended SeparateBranch to support both just branches and all control flow instructions. 2023-11-15 16:36:49 -06:00
David Harris
cfaeeae25a Added cmoz support to imperas.ic and adjusted imperas testbench to no longer need FPGA parameter 2023-11-15 08:15:01 -08:00
Rose Thompson
feb45b9b59 Patched up linux imperas testbench. 2023-11-14 14:20:13 -06:00
Rose Thompson
fdb75203cb Added cbop to to rv32gc. 2023-11-14 10:55:22 -06:00
Rose Thompson
95fc5f4a1c Towards removing the FPGA config file. 2023-11-13 17:20:26 -06:00
David Harris
426aabbc1a Imperas commenting 2023-11-10 08:26:32 -08:00
David Harris
7e00581187 Add Svadu support and SPI to imperas configuration 2023-11-10 06:27:25 -08:00
David Harris
625652b9ca Reporting stall path in synthesis script, support Zcb in Imperas 2023-11-09 06:59:29 -08:00
David Harris
2b183020d5 Fixed bit manpulation on imperas config 2023-11-06 14:11:01 -08:00
David Harris
9c4a7866b8 Fixed Svnapot_page_mask for imperas.ic 2023-11-05 06:51:01 -08:00
David Harris
568aa3c4a6 Verilator improvements 2023-11-04 03:21:07 -07:00
naichewa
fefb5adb8f code review harris 2023-10-31 12:27:41 -07:00
naichewa
7dd3f24d6c Merge branch 'main' into spi 2023-10-30 17:01:41 -07:00
naichewa
2330f4ee63 hardware interlock 2023-10-30 17:00:20 -07:00
Rose Thompson
bd04ffc0c9 Fixed bug in bpred-sim.py for btb and class size sweep. 2023-10-24 10:29:02 -05:00
Rose Thompson
ea403e02ff Updated bpred-sim.py to take command line options to select between sweeping direction, target, class, or ras prediction. 2023-10-23 16:09:40 -05:00
David Harris
b76c371e45 Config file cleanup 2023-10-18 05:38:36 -07:00
David Harris
fab9fbd7f1 Merged testbench 2023-10-16 13:52:24 -07:00
David Harris
1a6e57f8c0 Renamed wally-config to config in many comments 2023-10-16 13:49:09 -07:00
David Harris
ac4216b43d Incorporated new AMO tests from riscv-arch-test 2023-10-16 10:25:45 -07:00
David Harris
434d6b2c5c minfo test working again with mconfigptr for RV64 2023-10-15 06:41:52 -07:00
Rose Thompson
8f2ca2ae15 Added missing files. 2023-10-13 15:10:58 -05:00
eroom1966
d690708194 add in new .sv file 2023-10-06 13:47:05 +01:00
Lee Moore
0a0d6dd25e Merge branch 'openhwgroup:main' into main 2023-10-06 11:46:45 +01:00
Ross Thompson
3bbcfade93 Completed branch predictor benchmarking. 2023-09-27 13:56:51 -05:00
Ross Thompson
f863cbf366 Actually fixed non-power of 2 issue with RAS. 
Added RAS swapping to branch predictor scripts and configurations.
 2023-09-27 12:25:05 -05:00
eroom1966
381cfdcb4b bring upto date with latest IDV 2023-09-21 11:29:31 +01:00
Ross Thompson
60ddbe31f8 Updated the branch predictor simulator's parseHPMC.py results. 
In a future commit I will update the branch predictor simulator with the fix for the gshare and then update the commit pointing their repo.
 2023-09-18 16:59:20 -05:00
Ross Thompson
95c653e7df Fixes the bpred-sim.py to support command line parameterization of the branch predictor while using the new parameterization. This is definitely a hack, but I don't see a better way. 2023-09-15 14:05:26 -05:00
Ross Thompson
9ff3642c6c Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-09-05 11:12:00 -05:00
Ross Thompson
de54b5c4d8 Updated wavefile 2023-09-05 11:11:56 -05:00
David Harris
9747d122d2 tlbNAPOT hangs due to PBMT making instruction memory uncacheable, and spill logic not working there. Fixed TLBLRU to update recently used on TLBHit rather than CAMHit. Moved coverage exclusions to proper line in pmachecker 2023-09-02 12:56:36 -07:00
David Harris
1642ad2bad Improved NAPOT test coverage 2023-08-30 21:04:36 -07:00
Ross Thompson
310b700550 Have a working 32 bit cbom test! 2023-08-21 13:46:09 -05:00
Ross Thompson
a89a1e675c Merge branch 'boot' into mergeBoot 
Merges Jacob's new sdc controller into wally.
 2023-07-21 17:43:45 -05:00
Ross Thompson
af0e33209f Removed QEMU from configurations. 2023-07-19 10:23:55 -05:00
Ross Thompson
9533dee300 Got xcelium running wally, but it fails to actually preload the memories. 2023-07-12 13:56:57 -05:00
Ross Thompson
625192d9a4 Merge branch 'main' of github.com:ross144/cvw into main 2023-07-11 15:08:26 -05:00
Ross Thompson
27f6f00402 Changes for xcelium. 2023-07-07 18:22:28 -05:00
Ross Thompson
235546fa06 Merge branch 'main' of github.com:ross144/cvw 2023-07-07 13:25:00 -05:00
James E. Stine
67fdeae9c9 Add reset to wave window 2023-06-29 08:47:16 -05:00
Ross Thompson
c6a55c446a Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-27 11:04:27 -05:00
Ross Thompson
cc5d8fbf06 Updates for fpga. 2023-06-27 11:04:20 -05:00
James E. Stine
dd6b12c6dc Add signals for ResMatch & CheckNow to sim window that are related to TestFloat operation 2023-06-26 10:15:46 -05:00
James E. Stine
0b7b28c2f0 For some reason this was modified - I probably made a mistake - put back vsim 2023-06-22 15:26:22 -05:00
James E. Stine
1f63e6d483 Remove path for cvw.sv so its found 2023-06-22 15:25:56 -05:00
James E. Stine
66643eb78e Update sim-testfloat to fix errors due to bad config element. I am not sure of the reasoning, but the specific path to the testvector was not getting inserted in Questa. This modification also adds features to test individualized tests (.e.g, binary16 only) -- documentation is added in the FPbuild.txt file 2023-06-20 17:26:54 -05:00
eroom1966
5f358d1af7 add changes for latest IDV file layout 2023-06-16 16:43:53 +01:00
Ross Thompson
4428babda9 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 15:38:38 -05:00
Ross Thompson
85567841eb Merge branch 'testbench-params2' 2023-06-15 15:31:13 -05:00
Ross Thompson
d2219023c3 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 14:57:23 -05:00
David Harris
72002625eb Fixed cvw path in lint-wally 2023-06-15 07:02:59 -07:00
David Harris
430537a052 Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
Ross Thompson
311c00bb15 Updates to wave file. 2023-06-14 10:49:09 -05:00
David Harris
004aeda362 Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
Ross Thompson
fe72264de3 The new testbench is almost working except the shadow copy is not working. 2023-06-12 15:08:23 -05:00
Ross Thompson
3ef2031791 Created temporary wrapper for lint. 2023-06-12 11:49:51 -05:00
eroom1966
d61ed17730 Update for new layout of ImperasDV files 2023-06-12 09:29:07 +01:00
Ross Thompson
e27dfb8ce0 Merge branch 'verilator' 2023-06-11 15:28:04 -05:00
James E. Stine
842f51dfeb Add notes for FP SoftFloat/TestFloat build as may be vague for some 2023-06-11 15:14:02 -05:00
David Harris
c9ca5108b1 Merge pull request #312 from ross144/main 
Fixed typo in coremark makefile.
 2023-06-06 05:44:22 -07:00
Ross Thompson
1ceea51d8b Changes required to make verilator compile wally's testbench to c++. Not actually tested in simulation yet. 2023-05-31 16:51:00 -05:00
Ross Thompson
76fd76c155 Oups forgot to include updates to the lint script itself. 2023-05-31 11:00:38 -05:00
David Harris
df57ccd885 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-05-30 13:53:28 -07:00
Ross Thompson
8648d0c25c Hacked it together, but I think testfloat is working. 2023-05-30 15:51:13 -05:00
David Harris
51d001889a Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-05-30 13:40:56 -07:00
Ross Thompson
09aa460ed8 Updated do files for parameterization. 2023-05-30 15:38:03 -05:00
David Harris
fc1c4b710c Exclusions for decoders with new parameterization 2023-05-30 01:04:39 -07:00
David Harris
cc157463d5 Eliminated merging non-existent coverage 2023-05-30 00:38:30 -07:00
Ross Thompson
04d0fd94f0 Merge branch 'param-lim-merge' 2023-05-26 16:25:35 -05:00
Ross Thompson
b91b54589e Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down. 2023-05-24 14:05:44 -05:00
Ross Thompson
88cc473c68 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-05-24 13:00:50 -05:00
Ross Thompson
930fb67308 Trying to figure out why the parameterization slowed down modelsim so much. 2023-05-24 12:44:42 -05:00
David Harris
59020e6ef6 Removed unnecessary imperas tests from coverage 2023-05-23 15:43:11 -07:00