cvw/sim
2023-06-15 15:38:38 -05:00
..
slack-notifier Renamed regression to sim 2023-02-02 14:48:23 -08:00
wave-dos Renamed regression to sim 2023-02-02 14:48:23 -08:00
bpred-sim.py Partially working local history repair. 2023-05-11 14:56:26 -05:00
buildrootBugFinder.py Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
coverage-exclusions-rv64gc.do Exclusions for decoders with new parameterization 2023-05-30 01:04:39 -07:00
FPbuild.txt Add notes for FP SoftFloat/TestFloat build as may be vague for some 2023-06-11 15:14:02 -05:00
fpga-wave.do Renamed regression to sim 2023-02-02 14:48:23 -08:00
GetLineNum.do track GetLinenum.do (tcl procedure to find line numbers to exclude) 2023-04-12 15:58:38 -07:00
imperas.ic Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
lint-wally Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 15:38:38 -05:00
linux-wave.do Modified the imperas linux scripts so they run without reporting hundreds of gigabytes of data. 2023-04-26 17:29:57 -05:00
make-tests.sh Renamed regression to sim 2023-02-02 14:48:23 -08:00
Makefile Eliminated merging non-existent coverage 2023-05-30 00:38:30 -07:00
makefile-memfile Renamed regression to sim 2023-02-02 14:48:23 -08:00
regression-wally Removed unnecessary imperas tests from coverage 2023-05-23 15:43:11 -07:00
run-imperas-linux.sh Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
run-imperasdv-tests.bash Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
rv64gc_CacheSim.py Misc typo and indent fixing. 2023-04-13 16:54:15 -07:00
sim-buildroot Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
sim-buildroot-batch Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
sim-imperas Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
sim-testfloat Renamed regression to sim 2023-02-02 14:48:23 -08:00
sim-testfloat-batch Add feature in testfloat.do to elect wave or nowave 2023-04-11 22:35:04 -05:00
sim-wally Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
sim-wally-batch Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 15:38:38 -05:00
test Renamed regression to sim 2023-02-02 14:48:23 -08:00
testfloat.do Hacked it together, but I think testfloat is working. 2023-05-30 15:51:13 -05:00
verilate Changes required to make verilator compile wally's testbench to c++. Not actually tested in simulation yet. 2023-05-31 16:51:00 -05:00
wally-batch.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wally-imperas-cov.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wally-imperas-no-idv.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wally-imperas.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wally-linux-imperas.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wally.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wave-all.do Renamed regression to sim 2023-02-02 14:48:23 -08:00
wave-fpu.do Renamed regression to sim 2023-02-02 14:48:23 -08:00
wave.do Updates to wave file. 2023-06-14 10:49:09 -05:00