James Stine
3864a7f798
missing privileged.sv
2024-06-03 17:25:32 -05:00
James Stine
5a03fbee97
add flopenrs back
2024-06-03 17:13:02 -05:00
James Stine
0bb6a8866a
fix missing input/output on debug module for lsu
2024-06-03 17:04:31 -05:00
James Stine
f5e01bea20
delete duplicate
2024-06-03 17:00:49 -05:00
James Stine
6a7f145de2
fix name of DSCR that I mistakenly made
2024-06-03 16:42:05 -05:00
James Stine
77ec3d58c6
seed debug module for Wally
2024-06-03 16:37:13 -05:00
Rose Thompson
b45b7ff7d6
Signal name changes to match book.
2024-06-02 16:32:25 -05:00
Rose Thompson
731e1fe08f
Updated spill logic to reflect changes in textbook.
2024-06-02 15:48:42 -05:00
Rose Thompson
84946919a4
Changed name CacheWriteData to WriteData.
2024-05-28 18:00:39 -05:00
Rose Thompson
273b41df99
Changed name of cache parameter NUMLINES to NUMSETS to better match book.
2024-05-28 17:55:43 -05:00
Jordan Carlin
6f7a802b86
Merge branch 'main' of https://github.com/openhwgroup/cvw into fround_fixes
2024-05-26 14:40:26 -07:00
Jordan Carlin
b830d20f2d
Modify Fround Tmask to work for X=1
2024-05-25 12:56:02 -07:00
Jordan Carlin
fb77440a64
Update fpctrl fmt to work for fround instructions
2024-05-24 15:33:45 -07:00
Jordan Carlin
ae29a9b861
Update control bits for froundnx
2024-05-24 15:19:20 -07:00
David Harris
a95977590d
AES cleanup
2024-05-24 14:28:30 -07:00
David Harris
b2689b4f01
AES cleanup
2024-05-24 14:13:57 -07:00
David Harris
ec5c67a5c1
AES cleanup
2024-05-24 13:48:53 -07:00
David Harris
e626052ec9
simplified AES32de mixcolumns because input is only one byte
2024-05-23 22:30:25 -07:00
David Harris
b0d1344121
Commented sha instructions
2024-05-23 22:06:37 -07:00
David Harris
ac153bc4ed
More simplifying sha512_32
2024-05-23 05:46:56 -07:00
David Harris
d9a1691c83
Simplified sha512_32
2024-05-23 05:39:50 -07:00
David Harris
c160ced2d2
Zk* cleanup
2024-05-22 15:01:20 -07:00
David Harris
3ad815ce34
Reordered Zicond support in ALU
2024-05-22 08:29:08 -07:00
David Harris
a17204b0fe
Continued bmu cleanup
2024-05-22 00:48:04 -07:00
David Harris
88eb7bd045
Pulled brev8 out of byteop so redundant byteop logic is not needed in zbkb
2024-05-22 00:22:53 -07:00
Jordan Carlin
1d8ffee20c
Certain Zcb instructions are dependent on other extensions, not the entire extension
2024-05-15 19:16:43 -07:00
Jordan Carlin
3df5a5abdd
Remove additional bitwise operator
2024-05-15 09:29:54 -07:00
Rose Thompson
e295454948
Merge pull request #798 from jordancarlin/newConfig
...
Update config to derive MISA from macros and update MISA bits based on the spec
2024-05-15 10:28:44 -05:00
Jordan Carlin
291d1e62d5
M implies Zmmul
2024-05-14 19:38:34 -07:00
Jordan Carlin
4a72922087
update config to derive MISA from macros
...
- Remove C_SUPPORTED and update decompress unit based on Zc* extensions
- Derive A_SUPPORTED from A subextensions
- Derive B_SUPPORTED from B subextensions
- Derive C_SUPPORTED from C subextensions
2024-05-14 06:49:18 -07:00
David Harris
175c18da01
Parameterized FMA. However, some offsets are not parameterized. See PR #793 for list of changes
2024-05-13 15:16:00 -07:00
David Harris
2dfada0687
Started parameterizing FMA
2024-05-13 14:01:36 -07:00
David Harris
c2b9e326ca
Fround cleanup
2024-05-13 13:27:29 -07:00
David Harris
e87a269f59
Fix fcvt.lu.s bug and lint issue in packoutput
2024-05-12 11:31:27 -07:00
David Harris
380d88fc68
Merged config-shared after fma fix
2024-05-12 11:10:55 -07:00
David Harris
009d251433
Fixed cvtint bug by adding 2 bits to convert width; initial implementation of fround passes basic regression but fails some nightly regression cases
2024-05-11 22:32:51 -07:00
Katherine Parry
807ef44772
fixed fma testfloat issue #578
2024-05-10 18:12:11 -07:00
Rose Thompson
b027fa44ef
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-05-10 08:53:00 -05:00
Rose Thompson
10b08f8039
Updated brach predictor names to more logical names and match textbook.
2024-05-10 08:51:12 -05:00
David Harris
77137f0f60
ZAAMO and ZALRSC implemented but not tested
2024-05-07 16:45:49 -07:00
David Harris
fcd75fd6b6
Fixed shiftcorrection typo causing failure on testfloat fcvt tests
2024-05-07 14:27:44 -07:00
David Harris
bdc2ad494f
Shared AND gate in ALU for extract / and paths
2024-05-03 09:07:33 -07:00
David Harris
4d5ac3b869
Turned off BMUSubArith for bext/bexti
2024-05-03 08:59:40 -07:00
David Harris
4639e92fda
Turned off BMUSubArith for bext/bexti
2024-05-03 08:56:14 -07:00
David Harris
c0afb44ed4
Tied dangling signals to 0 for some configs to make VCS lint happy
2024-04-28 22:50:36 -07:00
David Harris
7695ad4755
More fround stub code to keep VCS happy
2024-04-28 22:21:51 -07:00
David Harris
06e34b7be4
Fixed byte enables for synthesis
2024-04-27 06:25:24 -07:00
David Harris
1274ec55af
Resolved merge conflict
2024-04-26 16:15:23 -07:00
David Harris
4faf44c4c6
Named zknde block in bitmanipalu
2024-04-25 17:24:00 -07:00
Rose Thompson
6c0b860742
Fixed the cache miss counter.
2024-04-24 16:14:51 -05:00