David Harris 4d5ac3b869 Turned off BMUSubArith for bext/bexti		2024-05-03 08:59:40 -07:00
..
cache	Fixed the cache miss counter.	2024-04-24 16:14:51 -05:00
ebu	Defined bit sizes more precisely to help VCS lint and conform to coding style	2024-04-21 08:40:11 -07:00
fpu	More fround stub code to keep VCS happy	2024-04-28 22:21:51 -07:00
generic	Fixed byte enables for synthesis	2024-04-27 06:25:24 -07:00
hazard	Defined bit sizes more precisely to help VCS lint and conform to coding style	2024-04-21 08:40:11 -07:00
ieu	Turned off BMUSubArith for bext/bexti	2024-05-03 08:59:40 -07:00
ifu	Tied dangling signals to 0 for some configs to make VCS lint happy	2024-04-28 22:50:36 -07:00
lsu	Tied dangling signals to 0 for some configs to make VCS lint happy	2024-04-28 22:50:36 -07:00
mdu	Defined bit sizes more precisely to help VCS lint and conform to coding style	2024-04-21 08:40:11 -07:00
mmu	Defined bit sizes more precisely to help VCS lint and conform to coding style	2024-04-21 08:40:11 -07:00
privileged	Defined bit sizes more precisely to help VCS lint and conform to coding style	2024-04-21 08:40:11 -07:00
uncore	Defined bit sizes more precisely to help VCS lint and conform to coding style	2024-04-21 08:40:11 -07:00
wally	Tied dangling signals to 0 for some configs to make VCS lint happy	2024-04-28 22:50:36 -07:00
cvw.sv	Fixed WALLY/RISCV paths in testbench/rom1p1r; search log files for warnings and errors	2024-04-21 00:02:15 -07:00