Pulled brev8 out of byteop so redundant byteop logic is not needed in zbkb

This commit is contained in:
David Harris 2024-05-22 00:22:53 -07:00
parent af75140bbc
commit 88eb7bd045
4 changed files with 15 additions and 12 deletions

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@ -103,7 +103,7 @@ module bitmanipalu import cvw::*; #(parameter cvw_t P) (
// ZBKB Unit
if (P.ZBKB_SUPPORTED) begin: zbkb
zbkb #(P.XLEN) ZBKB(.A(ABMU), .B(BBMU), .RevA, .W64, .Funct3, .ZBKBSelect(ZBBSelect[2:0]), .ZBKBResult);
zbkb #(P.XLEN) ZBKB(.A(ABMU), .B(BBMU), .W64, .Funct3, .ZBKBSelect(ZBBSelect[2:0]), .ZBKBResult);
end else assign ZBKBResult = '0;
// ZBKX Unit

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@ -30,24 +30,22 @@
module byteop #(parameter WIDTH=32) (
input logic [WIDTH-1:0] A, // Operands
input logic [WIDTH-1:0] RevA, // Reversed A
input logic [1:0] ByteSelect, // LSB of Immediate
output logic [WIDTH-1:0] ByteResult); // rev8, orcb result
logic [WIDTH-1:0] OrcBResult, Rev8Result, Brev8Result;
logic [WIDTH-1:0] OrcBResult, Rev8Result;
genvar i;
for (i=0;i<WIDTH;i+=8) begin:loop
assign OrcBResult[i+7:i] = {8{|A[i+7:i]}};
assign Rev8Result[WIDTH-i-1:WIDTH-i-8] = A[i+7:i];
assign Brev8Result[i+7:i] = RevA[WIDTH-1-i:WIDTH-i-8];
end
// ByteOp Result Mux
// mux3 #(WIDTH) byteresultmux(Rev8Result, Brev8Result, OrcBResult, ByteSelect, ByteResult);
always_comb begin
if (ByteSelect[0] == 1'b0) ByteResult = Rev8Result;
else if (ByteSelect[1] == 1'b0) ByteResult = OrcBResult;
else ByteResult = Brev8Result;
end
else /*if (ByteSelect[1] == 1'b0) */ ByteResult = OrcBResult;
end
endmodule

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@ -45,7 +45,7 @@ module zbb #(parameter WIDTH=32) (
mux2 #(1) ltmux(LT, LTU, BUnsigned , lt);
cnt #(WIDTH) cnt(.A, .RevA, .B(B[1:0]), .W64, .CntResult);
byteop #(WIDTH) bu(.A, .RevA, .ByteSelect({B[10], B[0]}), .ByteResult);
byteop #(WIDTH) bu(.A, .ByteSelect({B[10], B[0]}), .ByteResult);
ext #(WIDTH) ext(.A, .ExtSelect({~B[2], {B[2] & B[0]}}), .ExtResult);
// ZBBSelect[2] differentiates between min(u) vs max(u) instruction

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@ -26,21 +26,26 @@
////////////////////////////////////////////////////////////////////////////////////////////////
module zbkb #(parameter WIDTH=32) (
input logic [WIDTH-1:0] A, B, RevA,
input logic [WIDTH-1:0] A, B,
input logic W64,
input logic [2:0] Funct3,
input logic [2:0] ZBKBSelect,
output logic [WIDTH-1:0] ZBKBResult
);
logic [WIDTH-1:0] ByteResult; // rev8, brev8
logic [WIDTH-1:0] Brev8Result; // rev8, brev8
logic [WIDTH-1:0] PackResult; // pack, packh, packw (RB64 only)
logic [WIDTH-1:0] ZipResult; // zip, unzip
// brev8 just uses wires
genvar i, j;
for (i=0;i<WIDTH/8;i=i+1)
for (j=0; j<8; j=j+1)
assign Brev8Result[i*8+j] = A[i*8+7-j];
byteop #(WIDTH) rev(.A, .RevA, .ByteSelect({B[10], B[0]}), .ByteResult);
packer #(WIDTH) pack(.A, .B, .PackSelect({ZBKBSelect[2], Funct3[1:0]}), .PackResult);
zipper #(WIDTH) zip(.A, .ZipSelect(Funct3[2]), .ZipResult);
// ZBKB Result Select Mux
mux3 #(WIDTH) zbkbresultmux(ByteResult, PackResult, ZipResult, ZBKBSelect[1:0], ZBKBResult);
mux3 #(WIDTH) zbkbresultmux(Brev8Result, PackResult, ZipResult, ZBKBSelect[1:0], ZBKBResult);
endmodule