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Updated brach predictor names to more logical names and match textbook.

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This commit is contained in:
Rose Thompson 2024-05-10 08:51:12 -05:00
parent 93ea5b0c1e
commit 10b08f8039
2 changed files with 3 additions and 4 deletions
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1
src/ifu/bpred/bpred.sv
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@ -212,7 +212,6 @@ module bpred import cvw::*; #(parameter cvw_t P) (
// could be wrong or the fall through address selected for branch predict not taken.
// By pipeline the BTB's PC and RAS address through the pipeline we can measure the accuracy of
// both without the above inaccuracies.
// **** use BPBTAWrongM from BTB.
assign RASPredPCWrongE = (RASPCE != IEUAdrE) & ReturnE & PCSrcE;
flopenrc #(P.XLEN) RASTargetDReg(clk, reset, FlushD, ~StallD, RASPCF, RASPCD);

6
src/ifu/bpred/gshare.sv
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@ -47,7 +47,7 @@ module gshare import cvw::*; #(parameter cvw_t P,
logic MatchF, MatchD, MatchE, MatchM, MatchW;
logic MatchX;
logic [1:0] TableBPDirPredF, BPDirPredD, BPDirPredE, FwdNewDirPredF;
logic [1:0] PHTBPDirPredF, BPDirPredD, BPDirPredE, FwdNewDirPredF;
logic [1:0] NewBPDirPredE, NewBPDirPredM, NewBPDirPredW;
logic [k-1:0] IndexNextF, IndexF, IndexD, IndexE, IndexM, IndexW;
@ -83,12 +83,12 @@ module gshare import cvw::*; #(parameter cvw_t P,
MatchM ? {NewBPDirPredM} :
NewBPDirPredW ;
assign BPDirPredF = MatchX ? FwdNewDirPredF : TableBPDirPredF;
assign BPDirPredF = MatchX ? FwdNewDirPredF : PHTBPDirPredF;
ram2p1r1wbe #(.USE_SRAM(P.USE_SRAM), .DEPTH(2**k), .WIDTH(2)) PHT(.clk(clk),
.ce1(~StallF), .ce2(~StallW & ~FlushW),
.ra1(IndexNextF),
.rd1(TableBPDirPredF),
.rd1(PHTBPDirPredF),
.wa2(IndexM),
.wd2(NewBPDirPredM),
.we2(BranchM),