Rose Thompson
|
a8024eee26
|
Revert "Updated subword misaligned."
This reverts commit 69d31d50e2.
|
2024-03-06 15:16:16 -06:00 |
|
Rose Thompson
|
298028b119
|
Revert "Cleanup."
This reverts commit 45c30267a5.
|
2024-03-06 15:16:03 -06:00 |
|
Rose Thompson
|
739e73ef81
|
Revert "Siginficant cleanup of subwordwritemisaligned."
This reverts commit fbc18abaa0.
|
2024-03-06 15:15:58 -06:00 |
|
Rose Thompson
|
e7ec2bedd4
|
Revert "Simplifications of subword code."
This reverts commit a402883115.
|
2024-03-06 15:15:51 -06:00 |
|
Rose Thompson
|
b64b883129
|
Revert "Removed duplicate endianswap."
This reverts commit caac48b7f2.
|
2024-03-06 15:15:43 -06:00 |
|
Rose Thompson
|
5447159cfd
|
Revert "Cleanup."
This reverts commit e84b7cc147.
|
2024-03-06 15:15:26 -06:00 |
|
Rose Thompson
|
3fa5faa6cf
|
Revert "Added sdc to pma allow shift."
This reverts commit a2d5618d88.
|
2024-03-06 13:29:08 -06:00 |
|
Rose Thompson
|
2ea0134329
|
Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned."
This reverts commit cba3209e7f.
|
2024-03-06 13:28:59 -06:00 |
|
Rose Thompson
|
068ffda5fb
|
Revert "Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned.""
This reverts commit 8136b45ca7.
|
2024-03-06 13:28:47 -06:00 |
|
Rose Thompson
|
c093f53c9c
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
Cleaned up the cacheLRU.
|
2024-03-05 11:08:40 -06:00 |
|
Rose Thompson
|
d1a1345e4d
|
Merge pull request #644 from davidharrishmc/dev
Synthesis fixes
|
2024-03-05 10:39:40 -06:00 |
|
Rose Thompson
|
e8e0538f6c
|
Changed to non-blocking in cacheLRU and removed clearing LRU bits on flush.
|
2024-03-05 10:33:47 -06:00 |
|
David Harris
|
1a0097f6e7
|
Further fdivsqrt simplification after starting Sqrt at iteration 0
|
2024-03-04 16:40:49 -08:00 |
|
David Harris
|
9c04df8f69
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2024-03-04 16:04:24 -08:00 |
|
David Harris
|
2e31bf021c
|
Merge pull request #646 from kevindkim723/sqrtbugfix_USLC
Square root R=4 K=2 bug fix
|
2024-03-04 16:04:14 -08:00 |
|
Rose Thompson
|
457d3481e7
|
How did this error get past for so long.
|
2024-03-04 17:58:41 -06:00 |
|
Rose Thompson
|
0222e8f42a
|
Don't want to clear the lru bits on invalidation (clearvalid).
|
2024-03-04 17:52:41 -06:00 |
|
Kevin Kim
|
10ab07975f
|
uslc comments
|
2024-03-04 14:31:21 -08:00 |
|
Kevin Kim
|
9b87a00698
|
sqrt mux lint fixes
|
2024-03-04 14:31:07 -08:00 |
|
Kevin Kim
|
587fdbdf8e
|
removed j1,j0 from iteration and put inside divider stage
|
2024-03-04 14:30:05 -08:00 |
|
Kevin Kim
|
7dec9cdf21
|
optimization in uslc
|
2024-03-04 10:46:16 -08:00 |
|
Kevin Kim
|
9c95cba865
|
remove sqrt cycle muxing
|
2024-03-03 18:51:10 -08:00 |
|
Kevin Kim
|
0ff59ff157
|
remove redundant mux
|
2024-03-03 13:00:20 -08:00 |
|
Kevin Kim
|
2547e4c6d1
|
divider still works with NF+2
|
2024-03-03 11:17:51 -08:00 |
|
Kevin Kim
|
c32173f163
|
changed U/C initialization to account for integer bit generation on divider stage for sqrt. Quick and dirty j1 logic fix
|
2024-03-03 10:30:18 -08:00 |
|
Kevin Kim
|
6c24afaf98
|
changed cycle count to account for integer bit generation for sqrt
|
2024-03-03 10:29:32 -08:00 |
|
Kevin Kim
|
c45d67f8ba
|
fdivsqrt changes
|
2024-03-02 20:29:03 -08:00 |
|
Kevin Kim
|
77ccc7b319
|
removed square root pre-process muxes
|
2024-03-02 15:55:34 -08:00 |
|
Rose Thompson
|
a22de45631
|
Removed unused storedelay from align.
|
2024-03-02 16:20:31 -06:00 |
|
Rose Thompson
|
8136b45ca7
|
Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned."
This reverts commit cba3209e7f.
|
2024-03-02 11:55:43 -06:00 |
|
Rose Thompson
|
cba3209e7f
|
Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned.
|
2024-03-02 11:38:33 -06:00 |
|
Rose Thompson
|
4c3d927474
|
Renamed CacheHit to Hit.
|
2024-03-01 11:00:24 -06:00 |
|
Rose Thompson
|
60f96112db
|
Moved the zero stage boot loader to the fpga directory.
|
2024-03-01 10:23:55 -06:00 |
|
Rose Thompson
|
e72880fd89
|
Changed cachefsm state STATE_HIT to STATE_ACCESS.
|
2024-03-01 09:59:54 -06:00 |
|
Rose Thompson
|
85691f0e8b
|
Simplified and clarified names in cacheLRU.
|
2024-02-29 17:18:01 -06:00 |
|
Rose Thompson
|
90ad5e7dab
|
Updated the cache for book clarity.
|
2024-02-28 17:07:32 -06:00 |
|
David Harris
|
90e89ced1d
|
Fixes for synthesis. HPTW change will break x detection
|
2024-02-26 04:20:08 -08:00 |
|
Rose Thompson
|
252ca5b925
|
Merge branch 'main' of https://github.com/openhwgroup/cvw
|
2024-02-23 14:11:18 -06:00 |
|
Rose Thompson
|
ab750e150f
|
Fixed lint errors for alignment.
|
2024-02-23 14:00:19 -06:00 |
|
Rose Thompson
|
a2d5618d88
|
Added sdc to pma allow shift.
|
2024-02-23 13:46:04 -06:00 |
|
Rose Thompson
|
e84b7cc147
|
Cleanup.
|
2024-02-23 13:00:21 -06:00 |
|
Rose Thompson
|
ae36f1e5a5
|
Merge branch 'main' of github.com:ross144/cvw
|
2024-02-23 09:43:03 -06:00 |
|
Rose Thompson
|
caac48b7f2
|
Removed duplicate endianswap.
|
2024-02-23 09:42:39 -06:00 |
|
Rose Thompson
|
a402883115
|
Simplifications of subword code.
|
2024-02-23 09:41:59 -06:00 |
|
Kevin Kim
|
b487477ecd
|
modified synth makefile to handle derived configs
|
2024-02-22 19:40:06 -08:00 |
|
Rose Thompson
|
fbc18abaa0
|
Siginficant cleanup of subwordwritemisaligned.
|
2024-02-22 14:17:15 -06:00 |
|
Rose Thompson
|
45c30267a5
|
Cleanup.
|
2024-02-22 14:08:04 -06:00 |
|
Rose Thompson
|
69d31d50e2
|
Updated subword misaligned.
|
2024-02-22 13:29:39 -06:00 |
|
Rose Thompson
|
6ed2376582
|
Merge pull request #641 from kevindkim723/regression-softfloat
updated softfloat configs list in regression-wally
|
2024-02-22 12:26:52 -06:00 |
|
Kevin Kim
|
dd88b4765a
|
updated configs list in regression-wally
|
2024-02-22 10:22:23 -08:00 |
|