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How did this error get past for so long.

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This commit is contained in:
Rose Thompson 2024-03-04 17:58:41 -06:00
parent 0222e8f42a
commit 457d3481e7
1 changed files with 1 additions and 1 deletions
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2
src/cache/cacheLRU.sv vendored
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@ -142,7 +142,7 @@ module cacheLRU
// This is a two port memory.
// Every cycle must read from CacheSetData and each load/store must write the new LRU.
always_ff @(posedge clk) begin
if (reset) for (int set = 0; set < NUMLINES; set++) LRUMemory[set] = '0; // exclusion-tag: initialize
if (reset) for (int set = 0; set < NUMLINES; set++) LRUMemory[set] <= '0; // exclusion-tag: initialize
if(CacheEn) begin
if(LRUWriteEn)
LRUMemory[PAdr] <= NextLRU;