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382 Commits

Author SHA1 Message Date
David Harris
15314a9c9a Gated floating-point load/stores with STATUS_FS and added initial decoding for Cache Management Operations 2023-07-02 00:34:30 -07:00
David Harris
41e9f20943 improved decoder checking atomic and RW and MW and privileged instructions 2023-07-02 00:02:03 -07:00
David Harris
e34ef4d636 improved decoder checking atomic instructions 2023-07-01 23:10:57 -07:00
David Harris
d930be332e Improved instruction decoding for illegal floating-point loads/stores and fences 2023-07-01 22:48:04 -07:00
David Harris
c383407d5c Removed redundant and not-covered atomic check from StoreStallD 2023-06-16 16:05:53 -07:00
Ross Thompson
4428babda9 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 15:38:38 -05:00
Ross Thompson
85567841eb Merge branch 'testbench-params2' 2023-06-15 15:31:13 -05:00
David Harris
9e839988dc Gated MDU to save power; doesn't seem to have affected simulation time 2023-06-15 12:17:23 -07:00
David Harris
9f88848832 Bit manipulation comment cleanup 2023-06-15 12:16:46 -07:00
Ross Thompson
75b5c23edd Actually removed old `define configuration file for rv64gc. There were a lot of dangling problems. 2023-06-15 14:05:44 -05:00
David Harris
a62211bad1 Gated inputs to BMU when inactive to save power and simulation time 2023-06-15 11:56:59 -07:00
Ross Thompson
b8a243827b Found a whole bunch of files still using the old `define configurations. 2023-06-15 13:09:07 -05:00
Ross Thompson
60e87b08c4 Improved simulation speed by gating bitmanip zbc's clmul's X and Y inputs with BSelect != 11. Reduced simulation time from 3m45s to 2m35s. 2023-06-14 15:28:58 -05:00
Harshini Srinath
5f73c9727f Update shifter.sv 
Program clean up
 2023-06-12 12:23:45 -07:00
Harshini Srinath
0f36cbd830 Update regfile.sv 
Program clean up
 2023-06-12 12:21:25 -07:00
Harshini Srinath
f1cef043c6 Update ieu.sv 
Program clean up
 2023-06-12 12:19:04 -07:00
Harshini Srinath
304adcb9b0 Update extend.sv 
Program clean up
 2023-06-12 12:15:33 -07:00
Harshini Srinath
1d24a9c912 Update datapath.sv 
Program clean up
 2023-06-12 12:13:58 -07:00
Ross Thompson
052bc95966 More parameterization. Copied Lim. Still no slow down. 2023-05-24 14:49:22 -05:00
Ross Thompson
b91b54589e Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down. 2023-05-24 14:05:44 -05:00
David Harris
a929656d9a Renamed byteUnit to byteop 2023-04-27 14:10:46 -07:00
Limnanthes Serafini
b3976daccd More cleanup 2023-04-13 21:34:50 -07:00
Limnanthes Serafini
034c289a36 Misc typo and indent fixing. 2023-04-13 16:54:15 -07:00
Ross Thompson
52d1c19509 Merge pull request #194 from davidharrishmc/dev 
Bit manipulation support in ImperasDV.  Test improvements.
 2023-04-04 09:13:27 -05:00
Kevin Kim
acebdeeb81 reduced mux3 to mux2 for input signal to clmul 2023-04-03 22:53:46 -07:00
David Harris
4e2d80476e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-03 06:13:16 -07:00
Kevin Kim
8252706691 removed comparator flag to ALU 2023-04-02 21:14:31 -07:00
Kevin Kim
238e97d379 signal renaming on bitmanip alu and alu 2023-04-02 18:42:41 -07:00
Kevin Kim
f175f7e927 changed signal names on clmul and zbc to match book 2023-04-02 18:28:09 -07:00
David Harris
db542543cb Coverage improvement: ieu, hazard, priv 2023-03-31 08:34:34 -07:00
David Harris
fd0c9e973d Coverage improvements in ieu, hazard units 2023-03-31 08:33:46 -07:00
Kevin Kim
2c6359b097 only pass in relevant comparator flag to ALU 2023-03-30 19:15:33 -07:00
Kevin Kim
1e88ec7eac Merge branch 'bitmanip_cleanup' of https://github.com/kipmacsaigoren/cvw into bitmanip_cleanup 2023-03-30 19:04:41 -07:00
Kevin Kim
27a5c9c5d6 Merge branch 'openhwgroup:main' into bitmanip_cleanup 2023-03-30 19:04:36 -07:00
Alec Vercruysse
46df428e56 add check for legal funct3 for IW instructions 2023-03-28 15:59:48 -07:00
Kevin Kim
582c561cb1 comment formatting 2023-03-28 11:40:19 -07:00
Kevin Kim
926f3d2a5a Merge branch 'openhwgroup:main' into bitmanip_cleanup 2023-03-28 11:31:18 -07:00
Kevin Kim
5d3260de63 removed unnecessary signal indices 2023-03-26 20:06:55 -07:00
Kevin Kim
f6ce03730a removed unneccesary input signal from zbb 2023-03-26 19:39:49 -07:00
David Harris
0b0d954e7f Merged ross's spacing fixes 2023-03-24 15:47:26 -07:00
David Harris
092d34373f Merge pull request #159 from ross144/main 
Renamed signal to match book
 2023-03-24 15:34:59 -07:00
Ross Thompson
46b1bca4fc Fixed all tap/space issue in RTL. 2023-03-24 17:32:25 -05:00
Kevin Kim
b70ab0fa5a Zero/Sign extend mux in Shifter, Zero extend mux in Bitmanip alu 2023-03-24 11:52:51 -07:00
David Harris
4b9b20bce0 Shifter capitalization 2023-03-24 09:01:07 -07:00
David Harris
89954df49b Query about CondExtA 2023-03-24 08:35:33 -07:00
David Harris
21424d0f86 Shifter sign simplification and capitalization 2023-03-24 08:27:30 -07:00
David Harris
576545e328 ALUControl Elimination 2023-03-24 08:10:48 -07:00
David Harris
f648be8ee2 Merged ALUOp into ALUControl to simplify ALU mux 2023-03-24 07:28:42 -07:00
David Harris
89479391ca Simplified rotate source to shifter 2023-03-24 06:49:26 -07:00
David Harris
e8d6073eca BMU simplifications 2023-03-24 06:18:06 -07:00
David Harris
3bdb176253 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-24 05:59:48 -07:00
Kevin Kim
4c73f0fffd minor formatting 2023-03-23 22:28:21 -07:00
Kevin Kim
5a19934511 comments 2023-03-23 22:22:25 -07:00
Kevin Kim
ae162a2694 removed redundant signals 
-fixed some comments too
 2023-03-23 22:20:37 -07:00
Kevin Kim
9c457e3af4 bitmanip alu submodule passes lint and regression 2023-03-23 21:56:03 -07:00
Kevin Kim
443e64bef2 more progress. Failing regression 2023-03-23 20:42:49 -07:00
Kevin Kim
2a2aa0470a Merge branch 'openhwgroup:main' into bitmanip-alu 2023-03-23 19:53:50 -07:00
David Harris
f2864c7305 Merged BMU 2023-03-23 17:24:40 -07:00
Kevin Kim
8e67c64e2c fixed rori rv32 bug 2023-03-23 16:06:46 -07:00
Kevin Kim
51d691215f more progress on bitmanip alu modularization 2023-03-23 16:02:38 -07:00
David Harris
4e1bf6fbe0 Improved IEU and bitmanip test coverage 2023-03-23 14:24:41 -07:00
Kevin Kim
519a0452a5 started bitmanip alu modularization 2023-03-23 14:02:28 -07:00
David Harris
121d1cea62 Added csrwrites.S test case for privileged tests 2023-03-23 10:55:32 -07:00
Kevin Kim
fd00e386b5 remove outdated 2023-03-22 10:34:17 -07:00
Kevin Kim
efa9f09864 updated header comments to indicate chapter 15 2023-03-22 10:31:21 -07:00
Kevin Kim
f7a915a71a remove helper python script 2023-03-22 10:27:59 -07:00
Kevin Kim
fce62fc213 formatting 2023-03-22 10:26:04 -07:00
Kevin Kim
e9f90050d5 min/max mux optimize 2023-03-22 10:25:54 -07:00
Kevin Kim
c8a5514ca5 formatting 2023-03-22 10:14:12 -07:00
Kevin Kim
3f46dff23e Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip 2023-03-21 11:20:05 -07:00
Kevin Kim
72a8b25272 formatting 2023-03-20 14:25:05 -07:00
Kevin Kim
2ad807728c more structural mux changes 2023-03-20 14:23:54 -07:00
Kevin Kim
4ecfa1bad3 added bitmanip 64 tests to updated regression script 
+ alu structural mux changes
 2023-03-20 14:19:39 -07:00
Kevin Kim
5056eb404c formatting 2023-03-20 13:09:49 -07:00
Kevin Kim
82d52f892b Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip 2023-03-20 13:06:10 -07:00
Kevin Kim
b394e343f6 format + min/max structural mux 2023-03-20 09:37:57 -07:00
David Harris
6922298f21 Replaced FenceM with InvalidateICacheM for event counting of fence.i 2023-03-18 09:24:31 -07:00
Kevin Kim
0d0d3b981e more checks in bitmanip decode 2023-03-10 17:17:24 -08:00
Kevin Kim
9b4f3219db formatting 2023-03-10 14:32:01 -08:00
Kevin Kim
c380b0816d removed redundant convinvb signal 2023-03-10 14:18:24 -08:00
Kevin Kim
dcaf9de228 removed redundant condinvb mux 2023-03-10 14:17:38 -08:00
David Harris
33fa7e4706 Simplified SLT and SLTU code in ALU 2023-03-09 15:14:52 -08:00
Kevin Kim
f29e8932a2 more comprehensive illegal b instr. check 2023-03-09 12:44:51 -08:00
Kevin Kim
f335d08bbf fixed bmu bug 
- accidentally deleted count instruction decode
 2023-03-09 12:35:42 -08:00
Kevin Kim
7002221dec cleaner bmu decode logic 2023-03-08 16:22:43 -08:00
Kevin Kim
0ca530fffd Merge branch 'bit-manip' into illegal_specific 2023-03-07 14:07:59 -08:00
Kevin Kim
4bb43892f9 alu formatting 2023-03-07 14:01:47 -08:00
Kevin Kim
26cb1857f3 specifc instruction handling for B's 
- Added BALUSrcBD, BaseALUSrcB for distinguishing between base instruction I/IW and Bitmanip instruction I/IW
 2023-03-07 13:58:08 -08:00
Kip Macsai-Goren
2ec3c741ef Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-07 13:44:51 -08:00
Kip Macsai-Goren
f178c90c02 Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-07 13:44:19 -08:00
Kevin Kim
bd9b9970f5 Merge remote-tracking branch 'origin' into illegal_specific 2023-03-07 11:30:36 -08:00
Kevin Kim
6d146a7e20 formatting 2023-03-07 10:57:52 -08:00
Kevin Kim
833e7bd2af shifter sign generation logic optimize 2023-03-07 10:57:06 -08:00
Kevin Kim
81198ce6f6 reverted backing to working version 2023-03-07 00:29:58 -08:00
Kevin Kim
5637897dce reverted to working version 2023-03-07 00:28:07 -08:00
David Harris
7ecf4cdea8 Fixed bug about rv64 shifts only using 6 bits of funct7 2023-03-06 13:10:51 -08:00
David Harris
7e0c96cdcc Simplified decoder default to illegal instruction 2023-03-06 11:21:11 -08:00
David Harris
c2efdbdbbb More detailed decoding of load/store/branch/jump 2023-03-06 11:15:48 -08:00
David Harris
a56557d847 Improved decoding illegal instructions in controller 2023-03-06 11:02:42 -08:00
Kevin Kim
c7d1e35d4a structural changes in cnt.sv 2023-03-06 06:44:15 -08:00
Kevin Kim
e67b02136c formatting 2023-03-06 06:20:25 -08:00
Kevin Kim
ee66b5fb4a formatting 
- reverted back to ALUResult signal in alu.sv
 2023-03-06 06:19:01 -08:00
Kevin Kim
8f3acedec8 formatted files 2023-03-06 05:52:08 -08:00
Kevin Kim
fb529e1640 updated license header 2023-03-06 05:41:53 -08:00
Kevin Kim
e80c1248a2 bug fix 2023-03-05 15:20:48 -08:00
Kevin Kim
3dbdf3d579 extend unit structural mux 2023-03-05 15:09:02 -08:00
Kevin Kim
696cfb6949 zbb result select mux structural 2023-03-05 14:57:30 -08:00
Kevin Kim
2ae32f75b5 zbc input mux structural 2023-03-05 14:26:31 -08:00
Kevin Kim
77d8f10574 revA signals to cnt, zbb 2023-03-05 14:26:24 -08:00
Kevin Kim
7836bc1e37 ALU changes 
- added PreShiftAmt signal for shadd
- condinvB now muxes from B instead of mask
 2023-03-05 14:06:24 -08:00
Kevin Kim
0f2360f0d7 bug in bctrl 
- deleted the min/minu decoding for some reason.
 2023-03-04 23:56:33 -08:00
Kevin Kim
6b25c64a1f BSelect from OH encoding to Binary 2023-03-04 23:19:31 -08:00
Kevin Kim
a293c350ba alu pre-shift 
-changed ALU pre shift logic to use a 2 bit shifter instead of mux
 2023-03-04 23:07:06 -08:00
Kevin Kim
7512e55699 added python script 
-I've been using this python script to make quick changes to the bitmanip controller
 2023-03-04 22:54:32 -08:00
Kevin Kim
9494cf9340 removed rotate signal in datapath and instead packed into the new BALUControl Signal 
- BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU
 2023-03-04 22:44:03 -08:00
Kevin Kim
f5dca0bf4f zbc result mux is now structural 2023-03-04 09:22:21 -08:00
Kevin Kim
72de867e65 Rotate signal now gets generated in bmu ctrl 2023-03-03 22:57:49 -08:00
Kevin Kim
b315066b03 license comments 2023-03-03 21:52:34 -08:00
Kevin Kim
0403cfd41a removed redundant signals in controller 2023-03-03 21:52:25 -08:00
Kevin Kim
8dd39fbcfb b controller generates comparison signed flag and controller branch signed logic updated accordingly 2023-03-03 17:12:29 -08:00
Kevin Kim
5e01f86bc5 sltD signal debug. Passes regression 2023-03-03 12:44:33 -08:00
Kevin Kim
c836eea17c sltD logic optimize 2023-03-03 12:35:40 -08:00
Kevin Kim
d6f8c1dd29 Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate 2023-03-03 09:54:08 -08:00
Kevin Kim
1c55d4a8d5 Merge branch 'openhwgroup:main' into bctrlmigrate 2023-03-03 09:53:59 -08:00
Kevin Kim
422b428cba removed outdated b-signals in controller 2023-03-03 08:45:42 -08:00
Kevin Kim
9cad890c1a comments to bctrl 2023-03-03 08:41:47 -08:00
Kevin Kim
19410b4196 migrated B-subarith logic into b controller 2023-03-03 08:40:29 -08:00
Kevin Kim
2c3271dd62 began subarith configurability optimization in controller 2023-03-03 08:27:11 -08:00
Ross Thompson
cfca77172e Added fence counter. 2023-03-02 23:29:20 -06:00
Kevin Kim
b21ca2fba0 bug fix, more elegant logic changes in controller 2023-03-02 16:00:56 -08:00
Kevin Kim
c9bd37c92b formatting 2023-03-02 15:28:43 -08:00
Kevin Kim
910eeea3ff removed main instruction decoder dependence on bmu controller 2023-03-02 15:28:33 -08:00
Kevin Kim
05b329dd6a added bitmanip illegal instruction signal 2023-03-02 15:09:55 -08:00
Kevin Kim
3e8e633a56 zbc comments 2023-03-02 13:52:00 -08:00
Kevin Kim
b0307f5082 formatted bmu decoder 2023-03-02 13:45:15 -08:00
Kevin Kim
24b0b83d52 moved ALUControlD into configurable block 2023-03-02 12:17:03 -08:00
Kevin Kim
0f60505179 moved SubArith and RegWriteE into configurable block 2023-03-02 12:15:57 -08:00
Kevin Kim
b81a5e4452 added BRegWriteE signal 2023-03-02 12:15:22 -08:00
Kevin Kim
5e10720bed rename shifternew to shifter 2023-03-02 11:45:32 -08:00
Kevin Kim
cf324510f3 zbc input select mux optimize 2023-03-02 11:43:05 -08:00
Kevin Kim
657719220a zbc select mux optimization 2023-03-02 11:40:29 -08:00
Kevin Kim
e62a752522 fixed controller lint, changed byte unit mux select name and input width 2023-03-02 11:36:12 -08:00
Kevin Kim
a5e2e24320 removed redundant zbs 2023-03-02 11:22:09 -08:00
Kip Macsai-Goren
58ab6ec805 Merge remote-tracking branch 'upstream/main' into bit-manip 2023-02-28 14:41:51 -08:00
Kevin Kim
df0d75034b bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG] 2023-02-28 12:09:35 -08:00
Kevin Kim
b61d881c1b added BRegWrite, BW64, BALUOp signals to bctrl and controller 
-TODO: Main decode in bmuctrl must assert these 3 signals
 2023-02-28 11:54:10 -08:00
Kevin Kim
692e406976 changed shifter source select signal name 2023-02-28 11:41:40 -08:00
Kevin Kim
1506d50c63 rename result back to ALUResult in ALU 2023-02-28 07:27:34 -08:00
David Harris
cf8b5f0783 Added support for ZMMUL 2023-02-27 07:29:53 -08:00
Kevin Kim
f5d3e0e8a0 removed old shifter 2023-02-24 17:33:47 -08:00
Kevin Kim
601c6fcdc4 removed now-redundant zero-extend mux in alu 2023-02-24 17:14:12 -08:00
Kevin Kim
1d4200e3a3 took sign extension out of shifter 2023-02-24 17:09:56 -08:00
Kevin Kim
00a0170b30 optimized mux to shifter, passes rv32/64i 2023-02-24 12:09:34 -08:00
Kevin Kim
8b6d699857 small optimization to condzext select 2023-02-23 21:57:28 -08:00
Kip Macsai-Goren
67f83cda7f Fixed lint errors on zero and pop count. All of regression passes 2023-02-22 20:25:51 -08:00
Kip Macsai-Goren
ba3bfdf68b Manual attempt to merge with upstream changes 2023-02-22 19:42:30 -08:00
Kip Macsai-Goren
d668c563f4 Merge remote-tracking branch 'upstream/main' into main 2023-02-21 14:48:41 -08:00
Kevin Kim
35bd4f7219 added individual zb tests in tests.vh and testbench 
- also minor alu/controller configurability changes
 2023-02-21 11:52:05 -08:00
David Harris
a445e53e8d Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well. 2023-02-21 09:32:17 -08:00
Kevin Kim
0f876c3111 B DONE (for now) 
- datapath passes along comparator flag to alu
-  controllers and zbb handle min/max instructions
 2023-02-18 22:12:55 -08:00
Kevin Kim
2319661b10 controlleres and zbb handle byte instructions 2023-02-18 21:06:55 -08:00
Kevin Kim
e7339902ae alu and controllers handle andn, orn, xnor 2023-02-18 20:57:07 -08:00
Kevin Kim
59e9c7c747 added logic to handle sign/zero extend instructions 2023-02-18 20:32:40 -08:00
Kevin Kim
ad63699aac fixed ctlzw bug in count unit 2023-02-18 20:12:30 -08:00
Kevin Kim
ecfcad20a0 zbb handles count instructions 2023-02-18 20:12:17 -08:00
Kevin Kim
543dc1e36a fixed bmuctrl decode bug 2023-02-18 20:11:50 -08:00
Kevin Kim
446327215d updated comments in bmuctrl 2023-02-18 19:57:10 -08:00
Kevin Kim
baff2c9362 rotate instructions now handled in ZBB unit 2023-02-18 19:56:54 -08:00
Kevin Kim
e4085764e7 removed redundant decode logic in bmuctrl 2023-02-18 19:50:36 -08:00
Kevin Kim
f18cd53dee began ZBB integration into ieu 2023-02-18 19:44:14 -08:00
Kevin Kim
5f56f72bb1 bmuctrl handles roriw 2023-02-18 16:26:16 -08:00
Kevin Kim
2ccbde9d09 configured shifter in alu 2023-02-17 21:58:49 -08:00
Kevin Kim
f85c1058ff shifter bug fix 
- roli not passing unless I keep the MSB (instead of inverting) of truncated offset
 2023-02-17 21:58:26 -08:00
Kevin Kim
77fc40149f controller supports some rotates 2023-02-17 21:57:34 -08:00
Kevin Kim
5e7ed8804f bmuctrl supports some rotates 2023-02-17 21:57:19 -08:00
Kevin Kim
9af0ffe3a9 added zero extend, pre-shift mux to ALU 2023-02-17 20:15:12 -08:00
Kevin Kim
cad0973b6b more elegant ZBA logic in controller 2023-02-17 20:14:47 -08:00
Kevin Kim
88d7c3b1f2 bmuctrl handles .uw instructions 2023-02-17 20:14:13 -08:00
Kevin Kim
01f3cc2838 controller supports ZBA instructions 2023-02-17 16:44:16 -08:00
Kevin Kim
b09d942d60 removed Funct7 in Execute Stage 2023-02-17 16:12:09 -08:00
Kevin Kim
a1570a88c9 bmuctrl checks for illegal zbs-style instructions 2023-02-17 12:54:08 -08:00
Kevin Kim
370ff54875 bctrl bug fix 
- bctrl decodes shift immediate instructions properly
 2023-02-17 11:16:29 -08:00
Kevin Kim
aba4eb80d4 alu bug fix 
- condmaskb piped in correctly instead of b
 2023-02-17 11:02:07 -08:00
Kevin Kim
07eaf146c2 alu looks at BSelect, added BSelect one hot signal 2023-02-17 09:51:49 -08:00
Kevin Kim
323d14f9d9 added alu changes to previous commit 2023-02-17 08:22:13 -08:00
Kevin Kim
44c9612a5c added BSelect Signal 
- BSelect [3:0] is a one hot encoding of if it's a ZBA_ZBB_ZBC_ZBS instruction
 2023-02-17 08:21:55 -08:00
Kevin Kim
ada6023a41 comments 2023-02-17 07:53:14 -08:00
Kevin Kim
ab542a5bc3 comments 2023-02-17 07:52:54 -08:00
Kevin Kim
290fcd1789 comment formatting 2023-02-17 07:51:28 -08:00
Kevin Kim
5b341ac3a7 alu handles ALU select instead of funct3 2023-02-17 07:51:10 -08:00
Kevin Kim
ff365de54a added BMU controll 2023-02-17 07:50:59 -08:00
Kevin Kim
f0c81247e4 Added ALUSelect signal into datapath, ieu, controller 2023-02-17 07:50:45 -08:00
David Harris
0d2baed943 Reverted lab3 changes in dev branch 2023-02-16 18:10:05 -08:00
David Harris
33eb5423cb Update datapath.sv 2023-02-16 17:53:31 -08:00
David Harris
113b124721 Update controller.sv 2023-02-16 17:52:44 -08:00
David Harris
43afa34338 Update alu.sv 2023-02-16 17:52:25 -08:00
Kevin Kim
921a32faf9 added comments to zbc units 2023-02-15 17:42:32 -08:00
Kevin Kim
50f0262498 zbc configurability and select mux 2023-02-15 17:39:37 -08:00
Kevin Kim
cd13913f07 controller forwards funct7 
- started the bmu controll register
 2023-02-15 17:38:12 -08:00
Kevin Kim
8feeaa5e94 zbc and carry-less multiply work properly 2023-02-15 17:37:09 -08:00