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removed outdated b-signals in controller
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@ -109,8 +109,6 @@ module controller(
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logic [`CTRLW-1:0] ControlsD; // Main Instruction Decoder control signals
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logic SubArithD; // TRUE for R-type subtracts and sra, slt, sltu or B-type ext clr, andn, orn, xnor
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logic subD, sraD, sltD, sltuD; // Indicates if is one of these instructions
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logic bclrD, bextD; // Indicates if is one of these instructions
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logic andnD, ornD, xnorD; // Indicates if is one of these instructions
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logic maxE, maxuE, minE, minuE; // Indicates if is one of these instructions in Execute Stage
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logic BranchTakenE; // Branch is taken
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logic eqE, ltE; // Comparator outputs
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@ -222,27 +220,13 @@ module controller(
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assign sltD = (Funct3D == 3'b010);
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end
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if (`ZBS_SUPPORTED) begin
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assign bclrD = (ALUSelectD == 3'b111 & BSelectD[0]);
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assign bextD = (ALUSelectD == 3'b101 & BSelectD[0]);
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end else begin
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assign bclrD = 1'b0;
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assign bextD = 1'b0;
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end
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if (`ZBB_SUPPORTED) begin
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assign andnD = (ALUSelectD == 3'b111 & BSelectD[2]);
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assign ornD = (ALUSelectD == 3'b110 & BSelectD[2]);
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assign xnorD = (ALUSelectD == 3'b100 & BSelectD[2]);
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// we only need these signals if we want to calculate a signedD flag in decode stage to pass to the comparator.
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assign maxE = (Funct3E[1:0] == 2'b10 & BSelectE[2]);
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assign maxuE = (Funct3E[1:0] == 2'b11 & BSelectE[2]);
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assign minE = (Funct3E[1:0] == 2'b00 & BSelectE[2]);
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assign minuE = (Funct3E[1:0] == 2'b01 & BSelectE[2]);
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end else begin
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assign andnD = 0;
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assign ornD = 0;
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assign xnorD = 0;
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assign maxE = 0;
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assign maxuE = 0;
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assign minE = 0;
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