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optimized mux to shifter, passes rv32/64i
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@ -54,6 +54,7 @@ module alu #(parameter WIDTH=32) (
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logic ALUOp; // 0 for address generation addition or 1 for regular ALU ops
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logic Asign, Bsign; // Sign bits of A, B
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logic Rotate;
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logic [WIDTH:0] shA; // 65 bit input source to shifter
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if (`ZBS_SUPPORTED) begin: zbsdec
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@ -61,6 +62,17 @@ module alu #(parameter WIDTH=32) (
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assign CondMaskB = (BSelect[0]) ? MaskB : B;
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end else assign CondMaskB = B;
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if (WIDTH == 64) begin
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always_comb
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case ({W64, SubArith})
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2'b00: shA = {{1'b0}, A};
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2'b01: shA = {A[63], A};
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2'b10: shA = {{33'b0}, A[31:0]};
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2'b11: shA = {{33{A[31]}}, A[31:0]};
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endcase
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end else assign shA = (SubArith) ? {A[31], A} : {{1'b0},A};
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if (`ZBA_SUPPORTED) begin: zbamuxes
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// Zero Extend Mux
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if (WIDTH == 64) begin
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@ -89,7 +101,7 @@ module alu #(parameter WIDTH=32) (
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assign {Carry, Sum} = CondShiftA + CondInvB + {{(WIDTH-1){1'b0}}, SubArith};
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// Shifts
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shifter sh(.A, .Amt(B[`LOG_XLEN-1:0]), .Right(Funct3[2]), .Arith(SubArith), .W64, .Y(Shift), .Rotate(Rotate));
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shifternew sh(.shA(shA), .Amt(B[`LOG_XLEN-1:0]), .Right(Funct3[2]), .Arith(SubArith), .W64, .Y(Shift), .Rotate(Rotate));
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// Condition code flags are based on subtraction output Sum = A-B.
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// Overflow occurs when the numbers being subtracted have the opposite sign
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153
src/ieu/shifternew.sv
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153
src/ieu/shifternew.sv
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@ -0,0 +1,153 @@
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///////////////////////////////////////////
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// shifter.sv
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//
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// Written: David_Harris@hmc.edu, Sarah.Harris@unlv.edu, kekim@hmc.edu
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// Created: 9 January 2021
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// Modified: 6 February 2023
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//
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// Purpose: RISC-V 32/64 bit shifter
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//
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// Documentation: RISC-V System on Chip Design Chapter 4 (Figure 4.5, Table 4.3)
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module shifternew (
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input logic [`XLEN:0] shA, // Source
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input logic [`LOG_XLEN-1:0] Amt, // Shift amount
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input logic Right, Arith, W64, Rotate, // Shift right, arithmetic, RV64 W-type shift
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output logic [`XLEN-1:0] Y); // Shifted result
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logic [2*`XLEN-2:0] z, zshift; // Input to funnel shifter, shifted amount before truncated to 32 or 64 bits
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logic [`LOG_XLEN-1:0] amttrunc, offset, CondOffsetTrunc; // Shift amount adjusted for RV64, right-shift amount
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if (`XLEN==32) begin:shifter // RV32
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always_comb // funnel mux
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if (Right) z = {{31{shA[32]}}, shA[31:0]};
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else z = {shA[31:0], 31'b0};
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assign amttrunc = Amt; // shift amount
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end else begin:shifter // RV64
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always_comb // funnel mux
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if (Right) z = {{63{shA[64]}},shA[63:0]};
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else z = {shA[63:0],{63'b0}};
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assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
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end
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// Handle left and right shifts with a funnel shifter.
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// For RV32, only 32-bit shifts are needed.
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// For RV64, 32- and 64-bit shifts are needed, with sign extension.
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/*
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// Funnel shifter input (see CMOS VLSI Design 4e Section 11.8.1, note Table 11.11 shift types wrong)
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if (`XLEN==32) begin:shifter // RV32
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always_comb // funnel mux
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if (Right)
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if (Arith) z = {{31{A[31]}}, A};
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else z = {31'b0, A};
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else z = {A, 31'b0};
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assign amttrunc = Amt; // shift amount
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end else begin:shifter // RV64
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always_comb // funnel mux
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if (W64) begin // 32-bit shifts
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if (Right)
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if (Arith) z = {64'b0, {31{A[31]}}, A[31:0]};
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else z = {95'b0, A[31:0]};
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else z = {32'b0, A[31:0], 63'b0};
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end else begin
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if (Right)
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if (Arith) z = {{63{A[63]}}, A};
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else z = {63'b0, A};
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else z = {A, 63'b0};
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end
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assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
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end
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*/
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/*
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if (`ZBB_SUPPORTED) begin: rotFunnel // HANDLES ROTATE
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if (`XLEN==32) begin:shifter // RV32
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always_comb // funnel mux
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if (Right)
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if (Rotate) z = {A[30:0], A[31:0]}; //ror (rv32)
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else
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if (Arith) z = {{31{A[31]}}, A};
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else z = {31'b0, A};
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else
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if (Rotate) z = {A[31:0], A[31:1]}; //rol (rv32)
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else z = {A, 31'b0};
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assign amttrunc = Amt; // shift amount
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end else begin:shifter // RV64
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always_comb // funnel mux
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if (W64) begin // 32-bit shifts
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if (Right)
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if (Rotate) z = {{64'b0},A[30:0],A[31:0]}; //rorw
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else
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if (Arith) z = {64'b0, {31{A[31]}}, A[31:0]};
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else z = {95'b0, A[31:0]};
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else
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if (Rotate) z = {{64'b0},A[31:0],A[31:1]}; //rolw
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else z = {32'b0, A[31:0], 63'b0};
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end else begin
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if (Right)
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if (Rotate) z = {A[62:0], A[63:0]}; //ror
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else
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if (Arith) z = {{63{A[63]}}, A};
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else z = {63'b0, A};
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else
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if (Rotate) z = {A[63:0], A[63:1]}; //rol
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else z = {A, 63'b0};
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end
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assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
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end
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end else begin: norotFunnel
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if (`XLEN==32) begin:shifter // RV32
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always_comb // funnel mux
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if (Right)
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if (Arith) z = {{31{A[31]}}, A};
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else z = {31'b0, A};
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else z = {A, 31'b0};
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assign amttrunc = Amt; // shift amount
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end else begin:shifter // RV64
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always_comb // funnel mux
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if (W64) begin // 32-bit shifts
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if (Right)
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if (Arith) z = {64'b0, {31{A[31]}}, A[31:0]};
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else z = {95'b0, A[31:0]};
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else z = {32'b0, A[31:0], 63'b0};
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end else begin
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if (Right)
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if (Arith) z = {{63{A[63]}}, A};
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else z = {63'b0, A};
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else z = {A, 63'b0};
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end
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assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
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end
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end
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*/
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// Opposite offset for right shifts
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assign offset = Right ? amttrunc : ~amttrunc;
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//if (`XLEN == 64) assign CondOffsetTrunc = (W64 & Rotate) ? {{1'b0}, offset[4:0]} : offset;
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//else assign CondOffsetTrunc = offset;
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// Funnel operation
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assign zshift = z >> offset;
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assign Y = zshift[`XLEN-1:0];
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endmodule
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