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alu bug fix
- condmaskb piped in correctly instead of b
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@ -90,10 +90,10 @@ module alu #(parameter WIDTH=32) (
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3'b001: FullResult = Shift; // sll, sra, or srl
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3'b010: FullResult = SLT; // slt
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3'b011: FullResult = SLTU; // sltu
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3'b100: FullResult = A ^ B; // xor, binv
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3'b110: FullResult = A | B; // or, bset
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3'b111: FullResult = A & B; // and, bclr
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3'b101: FullResult = {{(WIDTH-1){1'b0}},{|(A & B)}};// bext
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3'b100: FullResult = A ^ CondMaskB; // xor, binv
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3'b110: FullResult = A | CondMaskB; // or, bset
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3'b111: FullResult = A & CondInvB; // and, bclr
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3'b101: FullResult = {{(WIDTH-1){1'b0}},{|(A & CondMaskB)}};// bext
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endcase
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end
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else begin
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