Jordan Carlin
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2f1a101735
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Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
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2024-07-25 21:21:57 -07:00 |
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David Harris
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b7fb786749
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Increased covergen.py functional coverage to 87.6%
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2024-07-23 04:38:13 -07:00 |
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David Harris
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a9fd6e6cfb
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Added more RV64I coverage generation
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2024-07-22 08:52:19 -07:00 |
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David Harris
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6ca7845c93
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Fixed hazard and rd_maxval coverage generation
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2024-07-21 19:46:30 -07:00 |
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Shreesh-Kulkarni
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82b42a5faf
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Modified riscv-isacov and riscv-ctg files to support some missing quad instructions. Needs debugging.
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2024-07-06 08:57:32 -07:00 |
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Jordan Carlin
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e6e070f4e4
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Update python shebangs to use /usr/bin/env python3 so virtual environment can be used (also aids in general portability)
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2024-07-03 20:42:55 -07:00 |
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Jordan Carlin
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2b4f12916e
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Merge pull request #858 from davidharrishmc/dev
Regression Improvements
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2024-07-01 20:04:31 -07:00 |
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James Stine
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f660779ba9
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Fix for Q causing it to error out - commented out line for ISA and reset-val so can be put back
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2024-06-28 12:17:15 -05:00 |
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David Harris
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8fe2052b1f
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Fix derived configuration with new derivgen script
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2024-06-26 16:09:59 -07:00 |
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David Harris
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21e5fa3103
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Merge pull request #854 from Shreesh-Kulkarni/main
Files for Quad Precision Testing Support for Wally
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2024-06-26 11:41:26 -07:00 |
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Shreesh-Kulkarni
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93fb0f2a84
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Files for Quad Precision Testing Support for Wally
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2024-06-26 11:36:04 -07:00 |
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David Harris
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0fcc7878dc
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Updated march lists
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2024-06-25 21:54:58 -07:00 |
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David Harris
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d8d94eeafa
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Merge pull request #808 from jordancarlin/main
Update riscv-arch-test
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2024-06-20 08:43:41 -07:00 |
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Ross Thompson
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9e93f21990
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Updated covergen to not include stores as they are incomplete.
Modified makefile riscv-dv to not simulation only generate tests.
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2024-06-19 15:13:49 -07:00 |
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Jordan Carlin
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d58b454a8b
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Finish switching Zfa to use riscv-arch-test
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2024-06-18 23:31:37 -07:00 |
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Jordan Carlin
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6f79dca9c4
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-05-27 12:29:24 -07:00 |
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Quswar Abid
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997b5901cc
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sb types are all passing, loaditypes are not!
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2024-05-27 04:27:50 -07:00 |
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Quswar Abid
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1bf9b13953
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added some sb types
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2024-05-27 03:58:38 -07:00 |
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Quswar Abid
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29d7cd5663
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unwanted comments
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2024-05-27 03:58:38 -07:00 |
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Quswar Abid
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8edc4057ed
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compilable tests generating for loaditypes[lb, lh, lw, ld, lbu, lhu, lwu]
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2024-05-27 03:58:38 -07:00 |
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Jordan Carlin
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dcafe4793e
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Add froundnx and fround.d tests
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2024-05-24 15:16:35 -07:00 |
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Jordan Carlin
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f410bbb79e
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Use Zfa tests from riscv-arch-test instead of wally-riscv-arch-test
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2024-05-21 00:04:27 -07:00 |
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Rose Thompson
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e295454948
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Merge pull request #798 from jordancarlin/newConfig
Update config to derive MISA from macros and update MISA bits based on the spec
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2024-05-15 10:28:44 -05:00 |
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Jordan Carlin
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1065b8977a
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Fix Q_SUPPORTED on derived configs
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2024-05-14 11:49:54 -07:00 |
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David Harris
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990d40410b
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Test using fpcalc for fp_dataset.py
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2024-05-14 11:11:24 -07:00 |
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Shreesh-Kulkarni
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9aebc1526e
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Python script to generate coverpoints for the IBM FP Dataset
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2024-05-14 10:43:32 -07:00 |
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Shreesh-Kulkarni
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0887e90367
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Modified IBM Floating Point Dataset Generator for Quads
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2024-05-14 10:34:45 -07:00 |
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David Harris
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75c10bddfa
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Moved case.sh to tests/fp
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2024-05-13 07:12:16 -07:00 |
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David Harris
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025e65ce1a
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Removed unnecessary printing from extract_arch_vectors
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2024-05-06 06:28:15 -07:00 |
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David Harris
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c8269c34a5
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Changed error to warning
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2024-05-06 03:50:17 -07:00 |
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David Harris
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99282165ae
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Directed functional coverage tests
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2024-05-04 02:45:01 -07:00 |
|
David Harris
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712a167a3a
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Removed obsolete testgen files
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2024-05-04 02:44:31 -07:00 |
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David Harris
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5d6665cc50
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More directed testing
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2024-05-03 11:44:03 -07:00 |
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David Harris
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325ec4c8c8
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Removed obsolete utility
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2024-05-03 10:58:44 -07:00 |
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David Harris
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e667adf946
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Added covergen directed coverage generator
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2024-05-01 14:47:37 -07:00 |
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David Harris
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b7e66ec7d6
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Added Zcb tests to riscof
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2024-04-20 13:17:33 -07:00 |
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Jordan Carlin
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6ef6bc042d
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Update RISCOF ISA config MISA values to be consistent
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2024-04-06 18:18:50 -07:00 |
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Rose Thompson
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b87cdd49a3
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Merge pull request #690 from davidharrishmc/dev
fcvt.h.l fixes, removed delays
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2024-03-28 13:42:41 -05:00 |
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David Harris
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2b29b107a7
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Wrote initial covergen for a few R-type instructions
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2024-03-27 16:22:13 -07:00 |
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Rose Thompson
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7c3e93bb2c
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added lpddrtest.
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2024-03-26 18:42:48 -05:00 |
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David Harris
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4eb7de7381
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Removed Zfh tests from wally-riscv-arch-test now that they are available in riscv-arch-test
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2024-03-26 13:58:59 -07:00 |
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David Harris
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6688577bc4
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Fixed fcvt test macro
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2024-03-25 12:21:15 -07:00 |
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David Harris
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690338b758
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Incorporated fixed fcvt.h.l* instructions; they now run in the testbench
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2024-03-25 06:08:27 -07:00 |
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David Harris
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b3661a0af4
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Removed unused WALLY-lrsc reference outputs that were incorrect and are not used because Sail is the reference instead
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2024-03-24 12:31:49 -07:00 |
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Rose Thompson
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e97c2cbd83
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Merge pull request #676 from davidharrishmc/dev
Incorporated Zfa and Zfh tests into wally-riscv-arch-test, mcmodel example code, minor cleanup
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2024-03-20 09:45:39 -05:00 |
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Kevin Kim
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d790a88277
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fixed bug in intdivrem test vector extraction
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2024-03-17 14:47:37 -07:00 |
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David Harris
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9ff9f9e0ae
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Updated wally-riscv-arch-test to be able to compile zfh and zfa tests. This caused a change in startup code, so certain reference_output results needed to change to compensate. Also commented out fcvtmod test in Zfa that fails because Sail produces the wrong expected value.
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2024-03-14 19:03:57 -07:00 |
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David Harris
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48799aa87c
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Added Zfh and Zfa tests to wally-riscv-arch-test until they are accepted in riscv-arch-test repo
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2024-03-14 10:49:36 -07:00 |
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David Harris
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5e3ff3e871
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Merge pull request #671 from Karl-Han/increase_riscof_jobs
Increase number of jobs in riscof to speedup building.
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2024-03-13 14:52:05 -07:00 |
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Kunlin Han
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b5419ccfc9
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Increase number of jobs in riscof to speedup building.
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2024-03-13 12:28:30 -07:00 |
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Rose Thompson
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3cf6a19729
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Merge branch 'main' into main
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2024-03-10 10:48:21 -05:00 |
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Rose Thompson
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402d71e5f4
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Added basic Quad testing.
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2024-03-07 15:19:53 -06:00 |
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Rose Thompson
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a85ace87c7
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Sold progress towards a decent q test.
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2024-03-07 15:01:48 -06:00 |
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Rose Thompson
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1872966b0b
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Progress.
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2024-03-07 13:02:24 -06:00 |
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Rose Thompson
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24dffa39d5
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Yay. David and I got our first Quad load/store instructions working!
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2024-03-07 12:48:52 -06:00 |
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Rose Thompson
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60f96112db
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Moved the zero stage boot loader to the fpga directory.
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2024-03-01 10:23:55 -06:00 |
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KelvinTr
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01c45ab9d7
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Fixed K extension changes
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2024-02-28 17:05:08 -06:00 |
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James E. Stine
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0d4d996655
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add spike riscof items for K extension test
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2024-02-24 22:43:33 -06:00 |
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David Harris
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824bc0dab7
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Fixed expected value on WALLY-satp-invalid
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2024-02-16 11:12:57 -08:00 |
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Rose Thompson
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6110799a1e
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Updated the wally rv32 priv tests to not use sail.
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2024-02-16 11:39:06 -06:00 |
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David Harris
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b362320dd9
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Removed unused Makefiles and Makefrags from wally-riscv-arch-test now that it is only used by riscof
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2024-02-16 06:46:49 -08:00 |
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David Harris
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d094201362
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Added NO_SAIL to wally-riscv-arch-test cases that stopped passing in Sail
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2024-02-16 06:27:49 -08:00 |
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David Harris
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9ba35991e3
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Finished FPU coverage
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2024-02-15 20:01:28 -08:00 |
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harshinisrinath
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86c35bad9f
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Wrote illegal instructions for remaining floating point instructions
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2024-02-07 17:13:49 -08:00 |
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harshinisrinath
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96c8526754
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Wrote illegal instructions for remaining floating point instructions
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2024-02-07 17:08:19 -08:00 |
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David Harris
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e7364290e3
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Restored instead of in testbench because prevents coverage analysis. Improved FPU coverage
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2024-02-07 06:27:53 -08:00 |
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David Harris
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dfee790ad7
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Fixed derivative generation when derivs don't already exist. Fixed lint to print success when no failures. Added Zfh fma tests. Some fp tests not running yet.
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2024-02-06 12:35:56 -08:00 |
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David Harris
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5d8d82414b
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Coverage improvements
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2024-02-04 11:40:38 -08:00 |
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Jordan Carlin
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2dce774d34
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tlb ramline coverage improvements
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2024-02-03 09:50:15 -08:00 |
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Jordan Carlin
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0312476fb3
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Update tlb camline ASID coverage to use single file
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2024-02-03 09:48:57 -08:00 |
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Jordan Carlin
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8633f263a2
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Complete coverage of tlb camlines in IFU
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2024-02-01 20:41:05 -08:00 |
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Rose Thompson
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87d91c5b14
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Coverage updates.
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2024-02-01 12:12:01 -06:00 |
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Rose Thompson
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ccf61853cf
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New coverage for ebu.
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2024-01-31 14:55:25 -06:00 |
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Rose Thompson
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07d1a4104a
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Improvement to ebu coverage.
Also modified object dumps to include data segments.
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2024-01-31 14:03:27 -06:00 |
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David Harris
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d9003da8e0
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Moved some tests to wally-riscv-arch-test list that are simulated
|
2024-01-30 10:28:51 -08:00 |
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David Harris
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45e2317636
|
Added Wally github address to header comments
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2024-01-29 05:38:11 -08:00 |
|
David Harris
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3620a10c0b
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Improved hptw and I CacheWays coverage
|
2024-01-26 14:55:51 -08:00 |
|
David Harris
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1c1d3eb956
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HPTW coverage improvements
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2024-01-26 10:46:38 -08:00 |
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David Harris
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2449e06e55
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Fixed FPU coverage, solved Issue 596 by misaligned AMO throwing access fault when misaligned non-amo are supported
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2024-01-25 21:03:41 -08:00 |
|
David Harris
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0e1c53f9f6
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Fixed tlbmisc testing with PBMTE = 0
|
2024-01-24 12:24:33 -08:00 |
|
David Harris
|
66a1edb261
|
More coverage touchup
|
2024-01-23 23:11:49 -08:00 |
|
David Harris
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7215f48dda
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coverage improvements: fixing problems running ImperasDV on coverage tests
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2024-01-23 22:21:01 -08:00 |
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David Harris
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d5f497eec5
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
|
2024-01-22 09:56:50 -08:00 |
|
Jordan Carlin
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0c13e14bbf
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coverage improvements for mret when mpp = 3; update imperas config
|
2024-01-22 09:52:58 -08:00 |
|
David Harris
|
4ffa5e7b0a
|
Coverage improvements
|
2024-01-22 09:49:24 -08:00 |
|
Jordan Carlin
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4936496bb9
|
fix sfence.inval.ir and sret coverage from previous PR
|
2024-01-22 08:58:31 -08:00 |
|
David Harris
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171430a695
|
FPU and PMP tests
|
2024-01-21 14:41:22 -08:00 |
|
David Harris
|
ff055c404c
|
fpu coverage improvements
|
2024-01-21 13:17:56 -08:00 |
|
David Harris
|
69218b4b86
|
Coverage improvements
|
2024-01-21 10:03:07 -08:00 |
|
David Harris
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9260d3c424
|
Add Zfh support to imperas.ic, use Zicond in riscof now that it is fixed in riscv-arch-test
|
2024-01-18 22:46:07 -08:00 |
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David Harris
|
13de147c7e
|
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-01-18 22:12:07 -08:00 |
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David Harris
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17c9be7695
|
Cleanup typos, remove Zicond from riscof until it is working
|
2024-01-18 21:36:52 -08:00 |
|
Jordan Carlin
|
82d9467eea
|
Add coverage of FIOM in different privelege modes
|
2024-01-18 19:29:16 -08:00 |
|
Jordan Carlin
|
12b2baff82
|
add coverage of sfence.inval.ir instruction and fix sret coverage
|
2024-01-18 17:33:59 -08:00 |
|
naichewa
|
8b60992e72
|
fixed SPI tests failing when no icache
|
2024-01-17 14:38:11 -08:00 |
|
David Harris
|
f8c88a398a
|
Coverage improvements
|
2024-01-15 07:16:41 -08:00 |
|
Jordan Carlin
|
51f670c821
|
Merge branch 'openhwgroup:main' into main
|
2024-01-12 19:43:01 -08:00 |
|
Jordan Carlin
|
6c797570fa
|
Add coverage for all Zcb instructions
|
2024-01-12 19:10:13 -08:00 |
|
Rose Thompson
|
0b2af0c99a
|
Modifed the sv39 tests so they work with just 128MiB physical memory.
|
2024-01-12 20:00:21 -06:00 |
|
Rose Thompson
|
e6a2595936
|
Modified sv48 svadu test to work with 128MB rather than 2GB physical memory.
|
2024-01-12 11:05:06 -06:00 |
|