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https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
More directed testing
This commit is contained in:
David Harris
parent
325ec4c8c8
commit
5d6665cc50
@ -1,4 +1,39 @@
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all:
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#all:
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# ./covergen.py
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# cd ../riscof; make wally-riscv-arch-test
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# cd ../../sim; make memfiles
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CEXT := c
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CPPEXT := cpp
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AEXT := s
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SEXT := S
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SRCEXT := \([$(CEXT)$(AEXT)$(SEXT)]\|$(CPPEXT)\)
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#SRCS = $(wildcard *.S)
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#PROGS = $(patsubst %.S,%,$(SRCS))
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SRCDIR = ${WALLY}/tests/functcov/rv64/I
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SRCEXT = S
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SOURCES ?= $(shell find $(SRCDIR) -type f -regex ".*\.$(SRCEXT)" | sort)
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OBJEXT = elf
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OBJECTS := $(SOURCES:.$(SEXT)=.$(OBJEXT))
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all:
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./covergen.py
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cd ../riscof; make wally-riscv-arch-test
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cd ../../sim; make memfiles
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make build
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build: $(OBJECTS)
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%.elf.objdump: %.elf
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# Change many things if bit width isn't 64
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$(SRCDIR)/%.elf: $(SRCDIR)/%.$(SEXT)
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riscv64-unknown-elf-gcc -g -o $@ -march=rv64gqc_zfa_zba_zbb_zbc_zbs_zfh_zicboz_zicbop_zicbom -mabi=lp64 -mcmodel=medany \
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-nostartfiles -T${WALLY}/examples/link/link.ld $<
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riscv64-unknown-elf-objdump -S -D $@ > $@.objdump
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riscv64-unknown-elf-elf2hex --bit-width 64 --input $@ --output $@.memfile
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extractFunctionRadix.sh $@.objdump
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clean:
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rm -f ${SRCDIR}/*.elf ${SRCDIR}/*.objdump ${SRCDIR}/*.addr *${SRCDIR}/.lab ${SRCDIR}/*.memfile
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@ -14,7 +14,7 @@ from datetime import datetime
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from random import randint
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from random import seed
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from random import getrandbits
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from os import getenv
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import os
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import re
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##################################
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@ -33,16 +33,16 @@ def signedImm12(imm):
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def writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen):
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lines = "\n# Testcase " + str(desc) + "\n"
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lines = lines + "li x" + str(rd) + ", MASK_XLEN(" + formatstr.format(rdval) + ") # initialize rd to a random value that should get changed\n"
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lines = lines + "li x" + str(rd) + ", " + formatstr.format(rdval) + " # initialize rd to a random value that should get changed\n"
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if (test in rtype):
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lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
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lines = lines + "li x" + str(rs2) + ", MASK_XLEN(" + formatstr.format(rs2val) + ") # initialize rs2 to a random value\n"
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lines = lines + "li x" + str(rs1) + ", " + formatstr.format(rs1val) + " # initialize rs1 to a random value \n"
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lines = lines + "li x" + str(rs2) + ", " + formatstr.format(rs2val) + " # initialize rs2 to a random value\n"
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lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", x" + str(rs2) + " # perform operation\n"
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elif (test in shiftitype):
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lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
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lines = lines + "li x" + str(rs1) + ", " + formatstr.format(rs1val) + " # initialize rs1 to a random value \n"
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lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", " + shiftImm(immval, xlen) + " # perform operation\n"
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elif (test in itype):
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lines = lines + "li x" + str(rs1) + ", MASK_XLEN(" + formatstr.format(rs1val) + ") # initialize rs1 to a random value \n"
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lines = lines + "li x" + str(rs1) + ", " + formatstr.format(rs1val) + " # initialize rs1 to a random value \n"
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lines = lines + test + " x" + str(rd) + ", x" + str(rs1) + ", " + signedImm12(immval) + " # perform operation\n"
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else:
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pass
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@ -79,22 +79,28 @@ def make_rs2(test, storecmd, xlen):
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def make_rd_rs1(test, storecmd, xlen):
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for r in range(32):
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[rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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desc = "cp_rd_rs1 (Test rd = rs1 = x" + str(r) + ")"
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writeCovVector(desc, r, rs2, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
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def make_rd_rs2(test, storecmd, xlen):
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for r in range(32):
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[rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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desc = "cp_rd_rs2 (Test rd = rs1 = x" + str(r) + ")"
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writeCovVector(desc, rs1, r, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
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def make_rd_rs1_rs2(test, storecmd, xlen):
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for r in range(32):
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[rs1, rs1, rd, rs1val, rs2val, immval, rdval] = randomize()
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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desc = "cp_rd_rs1_rs2 (Test rd = rs1 = rs2 = x" + str(r) + ")"
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writeCovVector(desc, r, r, r, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
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def make_rs1_rs2(test, storecmd, xlen):
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for r in range(32):
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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desc = "cp_rd_rs1_rs2 (Test rs1 = rs2 = x" + str(r) + ")"
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writeCovVector(desc, r, r, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
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def make_rs1_maxvals(test, storecmd, xlen):
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for v in [0, 2**(xlen-1), 2**(xlen-1)-1, 2**xlen-1, 1, 2**(xlen-1)+1]:
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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@ -131,6 +137,29 @@ def make_rs1_rs2_eqval(test, storecmd, xlen):
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#def make_cp_gpr_hazard(test, storecmd, xlen):
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# pass # *** to be implemented ***
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def make_rs1_sign(test, storecmd, xlen):
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for v in [1, -1]:
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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rs1val = abs(rs1val) * v;
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desc = "cp_rs1_sign (Test source rs1 value = " + hex(rs1val) + ")"
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writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
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def make_rs2_sign(test, storecmd, xlen):
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for v in [1, -1]:
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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rs2val = abs(rs2val) * v;
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desc = "cp_rs2_sign (Test source rs2 value = " + hex(rs2val) + ")"
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writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
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def make_cr_rs1_rs2_sign(test, storecmd, xlen):
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for v1 in [1, -1]:
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for v2 in [1, -1]:
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[rs1, rs2, rd, rs1val, rs2val, immval, rdval] = randomize()
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rs1val = abs(rs1val) * v1;
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rs2val = abs(rs2val) * v2;
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desc = "cr_rs1_rs2 (Test source rs1 = " + hex(rs1val) + " rs2 = " + hex(rs2val) + ")"
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writeCovVector(desc, rs1, rs2, rd, rs1val, rs2val, immval, rdval, test, storecmd, xlen)
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def write_tests(coverpoints, test, storecmd, xlen):
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for coverpoint in coverpoints:
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if (coverpoint == "cp_asm_count"):
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@ -141,12 +170,18 @@ def write_tests(coverpoints, test, storecmd, xlen):
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make_rs1(test, storecmd, xlen)
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elif (coverpoint == "cp_rs2"):
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make_rs2(test, storecmd, xlen)
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elif (coverpoint == "cp_rd_rs1"):
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elif (coverpoint == "cmp_rd_rs1"):
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make_rd_rs1(test, storecmd, xlen)
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elif (coverpoint == "cp_rd_rs2"):
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elif (coverpoint == "cmp_rd_rs2"):
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make_rd_rs2(test, storecmd, xlen)
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elif (coverpoint == "cp_rd_rs1_rs2"):
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elif (coverpoint == "cmp_rd_rs1_rs2"):
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make_rd_rs1_rs2(test, storecmd, xlen)
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elif (coverpoint == "cmp_rd_rs1_eq"):
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pass # duplicate of cmp_rd_rs1
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elif (coverpoint == "cmp_rd_rs2_eq"):
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pass # duplicate of cmp_rd_rs2
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elif (coverpoint == "cmp_rs1_rs2_eq"):
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make_rs1_rs2(test, storecmd, xlen)
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elif (coverpoint == "cp_rs1_maxvals"):
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make_rs1_maxvals(test, storecmd, xlen)
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elif (coverpoint == "cp_rs2_maxvals"):
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@ -159,8 +194,22 @@ def write_tests(coverpoints, test, storecmd, xlen):
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make_rd_rs2_eqval(test, storecmd, xlen)
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elif (coverpoint == "cmp_rs1_rs2_eqval"):
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make_rs1_rs2_eqval(test, storecmd, xlen)
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# elif (coverpoint == "cp_gpr_hazard"):
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# make_cp_gpr_hazard(test, storecmd, xlen)
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elif (coverpoint == "cp_rs1_sign"):
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make_rs1_sign(test, storecmd, xlen)
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elif (coverpoint == "cp_rs2_sign"):
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make_rs2_sign(test, storecmd, xlen)
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elif (coverpoint == "cp_rd_sign"):
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pass # hope already covered by rd_maxvals
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elif (coverpoint == "cr_rs1_rs2"):
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make_cr_rs1_rs2_sign(test, storecmd, xlen)
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elif (coverpoint == "cp_rs1_toggle"):
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pass # toggle not needed and seems to be covered by other things
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elif (coverpoint == "cp_rs2_toggle"):
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pass # toggle not needed and seems to be covered by other things
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elif (coverpoint == "cp_rd_toggle"):
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pass # toggle not needed and seems to be covered by other things
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elif (coverpoint == "cp_gpr_hazard"):
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pass # not yet implemented
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else:
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print("Error: " + coverpoint + " not implemented yet for " + test)
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@ -188,7 +237,7 @@ def getcovergroups(coverdefdir, coverfiles):
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##################################
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# change these to suite your tests
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riscv = getenv("RISCV")
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riscv = os.environ.get("RISCV")
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coverdefdir = riscv+"/ImperasDV-OpenHW/Imperas/ImpProprietary/source/host/riscvISACOV/source/coverage";
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#coverfiles = ["RV64I", "RV64M", "RV64A", "RV64C", "RV64F", "RV64D"] # add more later
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coverfiles = ["RV64I"] # add more later
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@ -222,13 +271,13 @@ for xlen in xlens:
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storecmd = "sd"
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wordsize = 8
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for test in coverpoints.keys():
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# for test in tests:
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# corners = [0, 1, 2, 0xFF, 0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1,
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# 2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1]
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corners = [0, 1, 2**(xlen)-1]
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pathname = "../wally-riscv-arch-test/riscv-test-suite/rv" + str(xlen) + "i_m/I/"
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# pathname = "../wally-riscv-arch-test/riscv-test-suite/rv" + str(xlen) + "i_m/I/"
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WALLY = os.environ.get('WALLY')
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pathname = WALLY+"/tests/functcov/rv" + str(xlen) + "/I/"
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cmd = "mkdir -p " + pathname
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os.system(cmd)
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basename = "WALLY-COV-" + test
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fname = pathname + "src/" + basename + ".S"
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fname = pathname + "/" + basename + ".S"
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# print custom header part
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f = open(fname, "w")
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@ -1,30 +1,2 @@
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RVTEST_CODE_END
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RVMODEL_HALT
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RVTEST_DATA_BEGIN
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.align 4
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rvtest_data:
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.word 0x98765432
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RVTEST_DATA_END
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RVMODEL_DATA_BEGIN
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wally_signature:
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.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
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#ifdef rvtest_mtrap_routine
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mtrap_sigptr:
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.fill 64*(XLEN/32),4,0xdeadbeef
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#endif
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#ifdef rvtest_gpr_save
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gpr_save:
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.fill 32*(XLEN/32),4,0xdeadbeef
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#endif
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RVMODEL_DATA_END
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.end
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@ -4,18 +4,9 @@
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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///////////////////////////////////////////
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#include "model_test.h"
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#include "arch_test.h"
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RVTEST_ISA("RV64I")
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.section .text.init
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.globl rvtest_entry_point
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rvtest_entry_point:
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RVMODEL_BOOT
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RVTEST_CODE_BEGIN
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RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",temp)
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la x6, wally_signature
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sd x0, 0(x6)
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