Jacob Pease
380d96b359
Working new boot process. Buildroot package for sdc.
2023-07-20 14:15:59 -05:00
Ross Thompson
c0966c32e5
Improved critical path.
2023-07-19 14:59:37 -05:00
Ross Thompson
538efaf771
Optimized critial path in ifu's spill logic.
2023-07-19 14:13:46 -05:00
Ross Thompson
af0e33209f
Removed QEMU from configurations.
2023-07-19 10:23:55 -05:00
Ross Thompson
b756b248b4
Wow. The newest version of Vivado does not like the enums as parameters.
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The solution is simple. I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
2023-07-18 15:07:10 -05:00
Ross Thompson
42e6364b3d
Merge branch 'main' of github.com:ross144/cvw
2023-07-17 15:52:27 -05:00
Ross Thompson
c82638774f
Updated the FPGA zero stage bootloader.
2023-07-17 15:52:13 -05:00
Ross Thompson
50bc679fef
Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations.
2023-07-14 16:31:44 -05:00
Jacob Pease
b3aaa87cba
Modified bootloader to access GUID partitions. SDC interrupt to PLIC.
...
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.
The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself was modified to accept the
SDC interrupt signal.
2023-07-14 13:36:44 -05:00
David Harris
644afa16cd
Clean up privilege rs1 decoding and implement svinval as sfence.vma
2023-07-13 02:41:17 -07:00
Ross Thompson
625192d9a4
Merge branch 'main' of github.com:ross144/cvw into main
2023-07-11 15:08:26 -05:00
Ross Thompson
38f32805ae
Created separate temporary testbench for xcelium.
2023-07-11 15:07:33 -05:00
Ross Thompson
4c4eb080ee
RTL changes for Xcelium.
2023-07-11 10:51:02 -05:00
Ross Thompson
12beada55b
Fixed the privilege decoder bug which prevented the fpga linux boot.
2023-07-10 17:00:06 -05:00
Ross Thompson
beaec570c7
Merge pull request #359 from davidharrishmc/dev
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CSR updates
2023-07-10 13:16:57 -04:00
David Harris
e713ba8d3e
MENVCFG only exists if U_SUPPORTED
2023-07-09 18:25:07 -07:00
Ross Thompson
27f6f00402
Changes for xcelium.
2023-07-07 18:22:28 -05:00
Ross Thompson
cdf73d3b51
Updated comments.
2023-07-06 15:24:26 -05:00
Ross Thompson
e4555dc4af
Removed unused parameter.
2023-07-06 14:57:07 -05:00
Ross Thompson
2ce8b66574
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-07-06 14:55:43 -05:00
David Harris
369e8fb5ec
Removed outdated commment about endianness
2023-07-06 12:41:46 -07:00
David Harris
869a7cb827
Removed MTINST, which is not used in a system without a hypervisor
2023-07-06 12:40:53 -07:00
Ross Thompson
a963e50e88
It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga.
2023-07-06 14:07:37 -05:00
Ross Thompson
df56ff73c0
This is at least functionally correct, but has verilator lint issues.
2023-07-06 11:53:34 -05:00
Ross Thompson
c000366d3e
closer, but the wally32/64priv tests are failing.
2023-07-05 17:47:38 -05:00
Ross Thompson
98147e116a
Partially solved fpga boot.
2023-07-05 17:30:55 -05:00
David Harris
269bb688ea
Fixed comment typo
2023-07-04 11:34:58 -07:00
David Harris
410ef01627
fixed spacing in fdivsqrt
2023-07-04 11:27:36 -07:00
David Harris
afe66d0ee4
Added prefetch instructions; sent cbo instructions to LSU
2023-07-02 10:55:35 -07:00
David Harris
723b8266cb
Added prefetch signals
2023-07-02 10:06:58 -07:00
David Harris
482e4e6e92
Enhanced decoder to produce individual CMOpE output for the 4 CMO instructions
2023-07-02 09:35:05 -07:00
David Harris
c48283801a
Fixed csr typos
2023-07-02 02:01:40 -07:00
David Harris
61208e486c
Fixed ENVCFG to reply on both MENVCFG and SENVCFG when in user mode
2023-07-02 02:00:27 -07:00
David Harris
b6ae5661b4
Added environment configuration control (menvcfg/senvcfg) of cbo instructions
2023-07-02 01:52:25 -07:00
David Harris
15314a9c9a
Gated floating-point load/stores with STATUS_FS and added initial decoding for Cache Management Operations
2023-07-02 00:34:30 -07:00
David Harris
41e9f20943
improved decoder checking atomic and RW and MW and privileged instructions
2023-07-02 00:02:03 -07:00
David Harris
e34ef4d636
improved decoder checking atomic instructions
2023-07-01 23:10:57 -07:00
David Harris
d930be332e
Improved instruction decoding for illegal floating-point loads/stores and fences
2023-07-01 22:48:04 -07:00
Ross Thompson
f5cee3fb66
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-06-18 16:37:19 -05:00
David Harris
c383407d5c
Removed redundant and not-covered atomic check from StoreStallD
2023-06-16 16:05:53 -07:00
Ross Thompson
c44d4321fb
FPGA synthesis is broken. This commit moves closer to fixing the issues causes by parameterization.
2023-06-16 15:40:13 -05:00
Ross Thompson
bdc5656ef3
Added comment to uart LCR to check reset value after updating FPGA.
2023-06-15 15:39:51 -05:00
Ross Thompson
4428babda9
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-06-15 15:38:38 -05:00
Ross Thompson
85567841eb
Merge branch 'testbench-params2'
2023-06-15 15:31:13 -05:00
Ross Thompson
d2219023c3
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-06-15 14:57:23 -05:00
David Harris
3ca271b6a7
Added input gating on FPU
2023-06-15 12:38:33 -07:00
David Harris
9e839988dc
Gated MDU to save power; doesn't seem to have affected simulation time
2023-06-15 12:17:23 -07:00
David Harris
9f88848832
Bit manipulation comment cleanup
2023-06-15 12:16:46 -07:00
Ross Thompson
75b5c23edd
Actually removed old `define configuration file for rv64gc. There were a lot of dangling problems.
2023-06-15 14:05:44 -05:00
David Harris
a62211bad1
Gated inputs to BMU when inactive to save power and simulation time
2023-06-15 11:56:59 -07:00
Ross Thompson
009d8966e9
Got the srams parameterized correctly now.
2023-06-15 13:42:24 -05:00
David Harris
d3aebc00d4
Fixed UART merge conflict
2023-06-15 11:36:37 -07:00
Ross Thompson
b8a243827b
Found a whole bunch of files still using the old `define configurations.
2023-06-15 13:09:07 -05:00
Harshini Srinath
dd7c13cc2d
Update wallypipelinedsoc.sv
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Program clean up
2023-06-15 10:39:37 -07:00
Harshini Srinath
b4469fd3bf
Update wallypipelinedcore.sv
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Program clean up
2023-06-15 10:38:38 -07:00
Harshini Srinath
85a513e542
Update cvw.sv
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Program clean up
2023-06-15 10:29:33 -07:00
Harshini Srinath
b5354a811e
Update uncore.sv
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Program clean up
2023-06-15 10:23:47 -07:00
Harshini Srinath
85b982f569
Update uart_apb.sv
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Program clean up
2023-06-15 10:21:46 -07:00
Harshini Srinath
59178a2e56
Update uartPC16550D.sv
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Program clean up
2023-06-15 10:20:29 -07:00
Harshini Srinath
d02891d244
Update rom_ahb.sv
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Program clean up
2023-06-15 10:13:15 -07:00
Harshini Srinath
e227f71d46
Update ram_ahb.sv
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Program clean up
2023-06-15 10:10:38 -07:00
Harshini Srinath
57f4c8a3e4
Update plic_apb.sv
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Program clean up
2023-06-15 10:08:16 -07:00
Harshini Srinath
cf25e9ce49
Update gpio_apb.sv
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Program clean up
2023-06-15 10:04:28 -07:00
Harshini Srinath
a8fa38ff14
Update clint_apb.sv
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Program clean up
2023-06-15 09:59:11 -07:00
David Harris
325a670435
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-06-15 07:01:44 -07:00
Ross Thompson
60e87b08c4
Improved simulation speed by gating bitmanip zbc's clmul's X and Y inputs with BSelect != 11. Reduced simulation time from 3m45s to 2m35s.
2023-06-14 15:28:58 -05:00
Harshini Srinath
3593762cfa
Merge branch 'main' into main
2023-06-14 11:52:45 -07:00
David Harris
430537a052
Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this.
2023-06-14 09:44:52 -07:00
David Harris
9da4005a1e
Removed *** from UART code
2023-06-14 08:47:01 -07:00
David Harris
5a2bcb917f
Removed QEMU from UART
2023-06-14 08:39:01 -07:00
Harshini Srinath
3f8cd8932c
Update csrs.sv
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Program clean up
2023-06-13 22:16:43 -07:00
Harshini Srinath
12af05da02
Update csrm.sv
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Program clean up
2023-06-13 22:08:06 -07:00
Harshini Srinath
a213f7d5a4
Update csrc.sv
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Program clean up
2023-06-13 21:54:47 -07:00
Harshini Srinath
6aba0187d7
Update csr.sv
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Program clean up
2023-06-13 21:12:49 -07:00
harshini
8570b2f332
deleting CodeAligner file
2023-06-13 17:41:37 -07:00
Harshini Srinath
9e1f03f93b
Update ahbapbbridge.sv
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Program clean up
2023-06-12 20:49:46 -07:00
Harshini Srinath
2c6322647f
Update trap.sv
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Program clean up
2023-06-12 20:31:44 -07:00
Harshini Srinath
dba1a77e5f
Update privmode.sv
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Program clean up
2023-06-12 20:27:48 -07:00
Harshini Srinath
63a7649179
Update privileged.sv
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Program clean up
2023-06-12 20:26:07 -07:00
Harshini Srinath
d2a41a6422
Update csru.sv
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Program clean up
2023-06-12 20:21:55 -07:00
Harshini Srinath
6866a9c541
Update csrsr.sv
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Program clean up
2023-06-12 20:19:47 -07:00
Harshini Srinath
fbdf76629f
Update csrsr.sv
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Program clean up
2023-06-12 20:15:29 -07:00
Harshini Srinath
120cde2aea
Update csrs.sv
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Program clean up
2023-06-12 19:53:41 -07:00
Harshini Srinath
6305412d57
Update csrm.sv
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Program clean up
2023-06-12 19:42:45 -07:00
Harshini Srinath
61d50a18da
Update csri.sv
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Program clean up
2023-06-12 19:32:04 -07:00
Harshini Srinath
02a11278fc
Update csrc.sv
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Program clean up
2023-06-12 19:03:34 -07:00
Harshini Srinath
a2645dd576
Update csr.sv
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Program clean up
2023-06-12 18:51:37 -07:00
Harshini Srinath
a1a9d668c5
Update pmpchecker.sv
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Program clean up
2023-06-12 18:44:36 -07:00
Harshini Srinath
09ac5b1817
Update pmpadrdec.sv
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Program clean up
2023-06-12 18:41:47 -07:00
Harshini Srinath
ccb81c84f4
Update pmachecker.sv
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Program clean up
2023-06-12 18:39:36 -07:00
Harshini Srinath
5a6a932b7e
Update mmu.sv
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Program clean up
2023-06-12 18:36:04 -07:00
Harshini Srinath
a57a619349
Update hptw.sv
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Program clean up
2023-06-12 18:31:38 -07:00
Harshini Srinath
ec0454111f
Update adrdecs.sv
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Program clean up
2023-06-12 18:22:32 -07:00
Harshini Srinath
b1ee6bfde5
Update adrdec.sv
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Program clean up
2023-06-12 17:28:21 -07:00
Harshini Srinath
7c51dd18dd
Update mul.sv
2023-06-12 14:00:37 -07:00
Harshini Srinath
08459c4cc4
Update mdu.sv
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Program clean up
2023-06-12 13:54:54 -07:00
Harshini Srinath
bdd2206817
Update div.sv
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Program clean up
2023-06-12 13:47:09 -07:00
Harshini Srinath
15928c5d7b
Update swbytemask.sv
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Program clean up
2023-06-12 13:37:35 -07:00
Harshini Srinath
f3a7d9030c
Update subwordwrite.sv
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Program clean up
2023-06-12 13:35:27 -07:00
Harshini Srinath
f1f21f0896
Update subwordread.sv
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Program clean up
2023-06-12 13:31:54 -07:00