Working new boot process. Buildroot package for sdc.

This commit is contained in:
Jacob Pease 2023-07-20 14:15:59 -05:00
parent b3aaa87cba
commit 380d96b359
18 changed files with 6224 additions and 5 deletions

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@ -1238,3 +1238,8 @@ create_debug_port u_ila_0 probe
set_property port_width 12 [get_debug_ports u_ila_0/probe242]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe242]
connect_debug_port u_ila_0/probe242 [get_nets [list {axiSDC/sd_data_serial_host0/blkcnt_reg[0]} {axiSDC/sd_data_serial_host0/blkcnt_reg[1]} {axiSDC/sd_data_serial_host0/blkcnt_reg[2]} {axiSDC/sd_data_serial_host0/blkcnt_reg[3]} {axiSDC/sd_data_serial_host0/blkcnt_reg[4]} {axiSDC/sd_data_serial_host0/blkcnt_reg[5]} {axiSDC/sd_data_serial_host0/blkcnt_reg[6]} {axiSDC/sd_data_serial_host0/blkcnt_reg[7]} {axiSDC/sd_data_serial_host0/blkcnt_reg[8]} {axiSDC/sd_data_serial_host0/blkcnt_reg[9]} {axiSDC/sd_data_serial_host0/blkcnt_reg[10]} {axiSDC/sd_data_serial_host0/blkcnt_reg[11]}]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe243]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe243]
connect_debug_port u_ila_0/probe243 [get_nets [list {SDCIntr}]]

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@ -0,0 +1,56 @@
create_debug_core u_ila_0 ila
set_property C_DATA_DEPTH 2048 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
startgroup
set_property C_EN_STRG_QUAL true [get_debug_cores u_ila_0 ]
set_property C_ADV_TRIGGER true [get_debug_cores u_ila_0 ]
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0 ]
set_property ALL_PROBE_SAME_MU_CNT 4 [get_debug_cores u_ila_0 ]
endgroup
connect_debug_port u_ila_0/clk [get_nets [list xlnx_ddr4_c0/inst/u_ddr4_infrastructure/addn_ui_clkout1 ]]
set_property port_width 64 [get_debug_ports u_ila_0/probe0]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {wallypipelinedsoc/core/PCM[0]} {wallypipelinedsoc/core/PCM[1]} {wallypipelinedsoc/core/PCM[2]} {wallypipelinedsoc/core/PCM[3]} {wallypipelinedsoc/core/PCM[4]} {wallypipelinedsoc/core/PCM[5]} {wallypipelinedsoc/core/PCM[6]} {wallypipelinedsoc/core/PCM[7]} {wallypipelinedsoc/core/PCM[8]} {wallypipelinedsoc/core/PCM[9]} {wallypipelinedsoc/core/PCM[10]} {wallypipelinedsoc/core/PCM[11]} {wallypipelinedsoc/core/PCM[12]} {wallypipelinedsoc/core/PCM[13]} {wallypipelinedsoc/core/PCM[14]} {wallypipelinedsoc/core/PCM[15]} {wallypipelinedsoc/core/PCM[16]} {wallypipelinedsoc/core/PCM[17]} {wallypipelinedsoc/core/PCM[18]} {wallypipelinedsoc/core/PCM[19]} {wallypipelinedsoc/core/PCM[20]} {wallypipelinedsoc/core/PCM[21]} {wallypipelinedsoc/core/PCM[22]} {wallypipelinedsoc/core/PCM[23]} {wallypipelinedsoc/core/PCM[24]} {wallypipelinedsoc/core/PCM[25]} {wallypipelinedsoc/core/PCM[26]} {wallypipelinedsoc/core/PCM[27]} {wallypipelinedsoc/core/PCM[28]} {wallypipelinedsoc/core/PCM[29]} {wallypipelinedsoc/core/PCM[30]} {wallypipelinedsoc/core/PCM[31]} {wallypipelinedsoc/core/PCM[32]} {wallypipelinedsoc/core/PCM[33]} {wallypipelinedsoc/core/PCM[34]} {wallypipelinedsoc/core/PCM[35]} {wallypipelinedsoc/core/PCM[36]} {wallypipelinedsoc/core/PCM[37]} {wallypipelinedsoc/core/PCM[38]} {wallypipelinedsoc/core/PCM[39]} {wallypipelinedsoc/core/PCM[40]} {wallypipelinedsoc/core/PCM[41]} {wallypipelinedsoc/core/PCM[42]} {wallypipelinedsoc/core/PCM[43]} {wallypipelinedsoc/core/PCM[44]} {wallypipelinedsoc/core/PCM[45]} {wallypipelinedsoc/core/PCM[46]} {wallypipelinedsoc/core/PCM[47]} {wallypipelinedsoc/core/PCM[48]} {wallypipelinedsoc/core/PCM[49]} {wallypipelinedsoc/core/PCM[50]} {wallypipelinedsoc/core/PCM[51]} {wallypipelinedsoc/core/PCM[52]} {wallypipelinedsoc/core/PCM[53]} {wallypipelinedsoc/core/PCM[54]} {wallypipelinedsoc/core/PCM[55]} {wallypipelinedsoc/core/PCM[56]} {wallypipelinedsoc/core/PCM[57]} {wallypipelinedsoc/core/PCM[58]} {wallypipelinedsoc/core/PCM[59]} {wallypipelinedsoc/core/PCM[60]} {wallypipelinedsoc/core/PCM[61]} {wallypipelinedsoc/core/PCM[62]} {wallypipelinedsoc/core/PCM[63]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe1]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list wallypipelinedsoc/core/TrapM ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe2]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list wallypipelinedsoc/core/InstrValidM ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe3]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {wallypipelinedsoc/core/InstrM[0]} {wallypipelinedsoc/core/InstrM[1]} {wallypipelinedsoc/core/InstrM[2]} {wallypipelinedsoc/core/InstrM[3]} {wallypipelinedsoc/core/InstrM[4]} {wallypipelinedsoc/core/InstrM[5]} {wallypipelinedsoc/core/InstrM[6]} {wallypipelinedsoc/core/InstrM[7]} {wallypipelinedsoc/core/InstrM[8]} {wallypipelinedsoc/core/InstrM[9]} {wallypipelinedsoc/core/InstrM[10]} {wallypipelinedsoc/core/InstrM[11]} {wallypipelinedsoc/core/InstrM[12]} {wallypipelinedsoc/core/InstrM[13]} {wallypipelinedsoc/core/InstrM[14]} {wallypipelinedsoc/core/InstrM[15]} {wallypipelinedsoc/core/InstrM[16]} {wallypipelinedsoc/core/InstrM[17]} {wallypipelinedsoc/core/InstrM[18]} {wallypipelinedsoc/core/InstrM[19]} {wallypipelinedsoc/core/InstrM[20]} {wallypipelinedsoc/core/InstrM[21]} {wallypipelinedsoc/core/InstrM[22]} {wallypipelinedsoc/core/InstrM[23]} {wallypipelinedsoc/core/InstrM[24]} {wallypipelinedsoc/core/InstrM[25]} {wallypipelinedsoc/core/InstrM[26]} {wallypipelinedsoc/core/InstrM[27]} {wallypipelinedsoc/core/InstrM[28]} {wallypipelinedsoc/core/InstrM[29]} {wallypipelinedsoc/core/InstrM[30]} {wallypipelinedsoc/core/InstrM[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 32 [get_debug_ports u_ila_0/probe4]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {wallypipelinedsoc/core/lsu/LSUHADDR[0]} {wallypipelinedsoc/core/lsu/LSUHADDR[1]} {wallypipelinedsoc/core/lsu/LSUHADDR[2]} {wallypipelinedsoc/core/lsu/LSUHADDR[3]} {wallypipelinedsoc/core/lsu/LSUHADDR[4]} {wallypipelinedsoc/core/lsu/LSUHADDR[5]} {wallypipelinedsoc/core/lsu/LSUHADDR[6]} {wallypipelinedsoc/core/lsu/LSUHADDR[7]} {wallypipelinedsoc/core/lsu/LSUHADDR[8]} {wallypipelinedsoc/core/lsu/LSUHADDR[9]} {wallypipelinedsoc/core/lsu/LSUHADDR[10]} {wallypipelinedsoc/core/lsu/LSUHADDR[11]} {wallypipelinedsoc/core/lsu/LSUHADDR[12]} {wallypipelinedsoc/core/lsu/LSUHADDR[13]} {wallypipelinedsoc/core/lsu/LSUHADDR[14]} {wallypipelinedsoc/core/lsu/LSUHADDR[15]} {wallypipelinedsoc/core/lsu/LSUHADDR[16]} {wallypipelinedsoc/core/lsu/LSUHADDR[17]} {wallypipelinedsoc/core/lsu/LSUHADDR[18]} {wallypipelinedsoc/core/lsu/LSUHADDR[19]} {wallypipelinedsoc/core/lsu/LSUHADDR[20]} {wallypipelinedsoc/core/lsu/LSUHADDR[21]} {wallypipelinedsoc/core/lsu/LSUHADDR[22]} {wallypipelinedsoc/core/lsu/LSUHADDR[23]} {wallypipelinedsoc/core/lsu/LSUHADDR[24]} {wallypipelinedsoc/core/lsu/LSUHADDR[25]} {wallypipelinedsoc/core/lsu/LSUHADDR[26]} {wallypipelinedsoc/core/lsu/LSUHADDR[27]} {wallypipelinedsoc/core/lsu/LSUHADDR[28]} {wallypipelinedsoc/core/lsu/LSUHADDR[29]} {wallypipelinedsoc/core/lsu/LSUHADDR[30]} {wallypipelinedsoc/core/lsu/LSUHADDR[31]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe5]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list wallypipelinedsoc/core/lsu/LSUHREADY ]]
create_debug_port u_ila_0 probe
set_property port_width 64 [get_debug_ports u_ila_0/probe6]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list {wallypipelinedsoc/core/lsu/LSUHWDATA[0]} {wallypipelinedsoc/core/lsu/LSUHWDATA[1]} {wallypipelinedsoc/core/lsu/LSUHWDATA[2]} {wallypipelinedsoc/core/lsu/LSUHWDATA[3]} {wallypipelinedsoc/core/lsu/LSUHWDATA[4]} {wallypipelinedsoc/core/lsu/LSUHWDATA[5]} {wallypipelinedsoc/core/lsu/LSUHWDATA[6]} {wallypipelinedsoc/core/lsu/LSUHWDATA[7]} {wallypipelinedsoc/core/lsu/LSUHWDATA[8]} {wallypipelinedsoc/core/lsu/LSUHWDATA[9]} {wallypipelinedsoc/core/lsu/LSUHWDATA[10]} {wallypipelinedsoc/core/lsu/LSUHWDATA[11]} {wallypipelinedsoc/core/lsu/LSUHWDATA[12]} {wallypipelinedsoc/core/lsu/LSUHWDATA[13]} {wallypipelinedsoc/core/lsu/LSUHWDATA[14]} {wallypipelinedsoc/core/lsu/LSUHWDATA[15]} {wallypipelinedsoc/core/lsu/LSUHWDATA[16]} {wallypipelinedsoc/core/lsu/LSUHWDATA[17]} {wallypipelinedsoc/core/lsu/LSUHWDATA[18]} {wallypipelinedsoc/core/lsu/LSUHWDATA[19]} {wallypipelinedsoc/core/lsu/LSUHWDATA[20]} {wallypipelinedsoc/core/lsu/LSUHWDATA[21]} {wallypipelinedsoc/core/lsu/LSUHWDATA[22]} {wallypipelinedsoc/core/lsu/LSUHWDATA[23]} {wallypipelinedsoc/core/lsu/LSUHWDATA[24]} {wallypipelinedsoc/core/lsu/LSUHWDATA[25]} {wallypipelinedsoc/core/lsu/LSUHWDATA[26]} {wallypipelinedsoc/core/lsu/LSUHWDATA[27]} {wallypipelinedsoc/core/lsu/LSUHWDATA[28]} {wallypipelinedsoc/core/lsu/LSUHWDATA[29]} {wallypipelinedsoc/core/lsu/LSUHWDATA[30]} {wallypipelinedsoc/core/lsu/LSUHWDATA[31]} {wallypipelinedsoc/core/lsu/LSUHWDATA[32]} {wallypipelinedsoc/core/lsu/LSUHWDATA[33]} {wallypipelinedsoc/core/lsu/LSUHWDATA[34]} {wallypipelinedsoc/core/lsu/LSUHWDATA[35]} {wallypipelinedsoc/core/lsu/LSUHWDATA[36]} {wallypipelinedsoc/core/lsu/LSUHWDATA[37]} {wallypipelinedsoc/core/lsu/LSUHWDATA[38]} {wallypipelinedsoc/core/lsu/LSUHWDATA[39]} {wallypipelinedsoc/core/lsu/LSUHWDATA[40]} {wallypipelinedsoc/core/lsu/LSUHWDATA[41]} {wallypipelinedsoc/core/lsu/LSUHWDATA[42]} {wallypipelinedsoc/core/lsu/LSUHWDATA[43]} {wallypipelinedsoc/core/lsu/LSUHWDATA[44]} {wallypipelinedsoc/core/lsu/LSUHWDATA[45]} {wallypipelinedsoc/core/lsu/LSUHWDATA[46]} {wallypipelinedsoc/core/lsu/LSUHWDATA[47]} {wallypipelinedsoc/core/lsu/LSUHWDATA[48]} {wallypipelinedsoc/core/lsu/LSUHWDATA[49]} {wallypipelinedsoc/core/lsu/LSUHWDATA[50]} {wallypipelinedsoc/core/lsu/LSUHWDATA[51]} {wallypipelinedsoc/core/lsu/LSUHWDATA[52]} {wallypipelinedsoc/core/lsu/LSUHWDATA[53]} {wallypipelinedsoc/core/lsu/LSUHWDATA[54]} {wallypipelinedsoc/core/lsu/LSUHWDATA[55]} {wallypipelinedsoc/core/lsu/LSUHWDATA[56]} {wallypipelinedsoc/core/lsu/LSUHWDATA[57]} {wallypipelinedsoc/core/lsu/LSUHWDATA[58]} {wallypipelinedsoc/core/lsu/LSUHWDATA[59]} {wallypipelinedsoc/core/lsu/LSUHWDATA[60]} {wallypipelinedsoc/core/lsu/LSUHWDATA[61]} {wallypipelinedsoc/core/lsu/LSUHWDATA[62]} {wallypipelinedsoc/core/lsu/LSUHWDATA[63]} ]]
create_debug_port u_ila_0 probe
set_property port_width 1 [get_debug_ports u_ila_0/probe7]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list {SDCIntr}]]

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@ -68,7 +68,7 @@ report_clock_interaction -file re
write_verilog -force -mode funcsim sim/syn-funcsim.v
source ../constraints/debug2.xdc
source ../constraints/vcu-small-debug.xdc
# set for RuntimeOptimized implementation

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@ -416,7 +416,7 @@ module fpgaTop
wire sd_cmd_reg_t;
// SD Card Interrupt signal
wire SDCintr;
(* mark_debug = "true" *) wire SDCIntr;
// New SDC Data IOBUF connections
wire [3:0] sd_dat_i;

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@ -0,0 +1,6 @@
config BR2_PACKAGE_FPGA_AXI_SDC
bool "FPGA AXI SDC"
help
The Vivado-RISC-V SDC Drivers.
https://www.github.com/eugene-tarassov/vivado-risc-v

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@ -0,0 +1,10 @@
FPGA_AXI_SDC_MODULE_VERSION = 1.0
# TODO This variable needs to change based on where the package
# contents are stored on each individual computer. Might parameterize
# this somehow.
FPGA_AXI_SDC_SITE = /home/jpease/repos/fpga-axi-sdc
FPGA_AXI_SDC_SITE_METHOD = local
FPGA_AXI_SDC_LICENSE = GPLv2
$(eval $(kernel-module))
$(eval $(generic-package))

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@ -0,0 +1,7 @@
FPGA_AXI_SDC_MODULE_VERSION = 1.0
FPGA_AXI_SDC_SITE = /home/jpease/repos/fpga-axi-sdc
FPGA_AXI_SDC_SITE_METHOD = local
FPGA_AXI_SDC_LICENSE = GPLv2
$(eval $(kernel-module))
$(eval $(generic-package))

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,9 @@
.PHONY: all clean
obj-m += fpga-axi-sdc.o
all:
$(MAKE) -C '$(LINUX-DIR)' M='$(PWD)' modules
$(MAKE) -C '$(LINUX-DIR)' M='$(PWD)' modules_install
clean:
$(MAKE) -C '$(LINUX-DIR)' M='$(PWD)' clean

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@ -0,0 +1,498 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/iopoll.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/regulator/consumer.h>
#include <linux/reset.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
#include <linux/mmc/mmc.h>
#include <linux/mmc/slot-gpio.h>
#include <linux/ktime.h>
/*
* AXI SD Card driver.
*
* AXI SD Card is open source Verilog implementation of high speed SD card controller.
* It is mainly used in FPGA designs.
*/
#ifdef CONFIG_DEBUG_INFO
#pragma GCC optimize("O0")
#endif
// Capability bits
#define SDC_CAPABILITY_SD_4BIT 0x0001
#define SDC_CAPABILITY_SD_RESET 0x0002
#define SDC_CAPABILITY_ADDR 0xff00
// Control bits
#define SDC_CONTROL_SD_4BIT 0x0001
#define SDC_CONTROL_SD_RESET 0x0002
// Card detect bits
#define SDC_CARD_INSERT_INT_EN 0x0001
#define SDC_CARD_INSERT_INT_REQ 0x0002
#define SDC_CARD_REMOVE_INT_EN 0x0004
#define SDC_CARD_REMOVE_INT_REQ 0x0008
// Command status bits
#define SDC_CMD_INT_STATUS_CC 0x0001 // Command complete
#define SDC_CMD_INT_STATUS_EI 0x0002 // Any error
#define SDC_CMD_INT_STATUS_CTE 0x0004 // Timeout
#define SDC_CMD_INT_STATUS_CCRC 0x0008 // CRC error
#define SDC_CMD_INT_STATUS_CIE 0x0010 // Command code check error
// Data status bits
#define SDC_DAT_INT_STATUS_TRS 0x0001 // Transfer complete
#define SDC_DAT_INT_STATUS_ERR 0x0002 // Any error
#define SDC_DAT_INT_STATUS_CTE 0x0004 // Timeout
#define SDC_DAT_INT_STATUS_CRC 0x0008 // CRC error
#define SDC_DAT_INT_STATUS_CFE 0x0010 // Data FIFO underrun or overrun
#define CMD_TIMEOUT_MS 1000
#define BUSY_TIMEOUT_MS 500
struct sdc_regs {
volatile uint32_t argument;
volatile uint32_t command;
volatile uint32_t response1;
volatile uint32_t response2;
volatile uint32_t response3;
volatile uint32_t response4;
volatile uint32_t data_timeout;
volatile uint32_t control;
volatile uint32_t cmd_timeout;
volatile uint32_t clock_divider;
volatile uint32_t software_reset;
volatile uint32_t power_control;
volatile uint32_t capability;
volatile uint32_t cmd_int_status;
volatile uint32_t cmd_int_enable;
volatile uint32_t dat_int_status;
volatile uint32_t dat_int_enable;
volatile uint32_t block_size;
volatile uint32_t block_count;
volatile uint32_t card_detect;
volatile uint32_t res_50;
volatile uint32_t res_54;
volatile uint32_t res_58;
volatile uint32_t res_5c;
volatile uint64_t dma_addres;
};
struct sdc_host {
struct platform_device * pdev;
struct sdc_regs __iomem * regs;
uint32_t clk_freq;
spinlock_t lock;
struct mmc_request * mrq;
struct mmc_data * data;
unsigned dma_addr_bits;
unsigned dma_count;
dma_addr_t dma_addr;
unsigned dma_size;
int irq;
};
static const struct of_device_id axi_sdc_of_match_table[] = {
{ .compatible = "riscv,axi-sd-card-1.0" },
{},
};
MODULE_DEVICE_TABLE(of, axi_sdc_of_match_table);
/* Set clock prescalar value based on the required clock in HZ */
static void sdc_set_clock(struct sdc_host * host, uint clock) {
unsigned clk_div;
/* Min clock frequency should be 400KHz */
if (clock < 400000) clock = 400000;
clk_div = host->clk_freq / (2 * clock);
if (clk_div > 0x100) clk_div = 0x100;
if (clk_div < 1) clk_div = 1;
if (host->regs->clock_divider != clk_div - 1) {
host->regs->clock_divider = clk_div - 1;
udelay(10000);
}
}
static void sdc_cmd_finish(struct sdc_host * host, struct mmc_command * cmd) {
while (1) {
unsigned status = host->regs->cmd_int_status;
if (status) {
// clear interrupts
host->regs->cmd_int_status = 0;
while (host->regs->software_reset != 0) {}
if (status == SDC_CMD_INT_STATUS_CC) {
// get response
cmd->resp[0] = host->regs->response1;
if (cmd->flags & MMC_RSP_136) {
cmd->resp[1] = host->regs->response2;
cmd->resp[2] = host->regs->response3;
cmd->resp[3] = host->regs->response4;
}
break;
}
cmd->error = (status & SDC_CMD_INT_STATUS_CTE) ? -ETIME : -EIO;
break;
}
}
}
static int sdc_setup_data_xfer(struct sdc_host * host, struct mmc_host * mmc, struct mmc_data * data) {
uint64_t timeout = 0;
data->bytes_xfered = 0;
if (host->dma_addr & 3) return -EINVAL;
if (data->blksz & 3) return -EINVAL;
if (data->blksz < 4) return -EINVAL;
if (data->blksz > 0x1000) return -EINVAL;
if (data->blocks > 0x10000) return -EINVAL;
if (host->dma_addr + data->blksz * data->blocks > ((uint64_t)1 << host->dma_addr_bits)) return -EINVAL;
if (data->sg->length < data->blksz * data->blocks) return -EINVAL;
// SD card data transfer time
timeout += data->blocks * data->blksz * 8 / (1 << mmc->ios.bus_width);
// SD card "busy" time
timeout += (uint64_t)mmc->ios.clock * BUSY_TIMEOUT_MS / 1000 * data->blocks;
host->regs->dma_addres = (uint64_t)host->dma_addr;
host->regs->block_size = data->blksz - 1;
host->regs->block_count = data->blocks - 1;
host->regs->data_timeout = (uint32_t)timeout;
if (host->regs->data_timeout != timeout) host->regs->data_timeout = 0;
return 0;
}
static int sdc_send_cmd(struct sdc_host * host, struct mmc_host * mmc, struct mmc_command * cmd, struct mmc_data * data) {
int command = cmd->opcode << 8;
uint64_t timeout = 0;
int xfer = 0;
if (cmd->flags & MMC_RSP_PRESENT) {
if (cmd->flags & MMC_RSP_136)
command |= 2;
else {
command |= 1;
}
}
if (cmd->flags & MMC_RSP_BUSY) command |= 1 << 2;
if (cmd->flags & MMC_RSP_CRC) command |= 1 << 3;
if (cmd->flags & MMC_RSP_OPCODE) command |= 1 << 4;
if (data && (data->flags & (MMC_DATA_READ | MMC_DATA_WRITE)) && data->blocks) {
host->dma_count = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, mmc_get_dma_dir(data));
if (host->dma_count != 1) {
dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, mmc_get_dma_dir(data));
return data->error = -EIO;
}
host->dma_addr = sg_dma_address(data->sg);
host->dma_size = sg_dma_len(data->sg);
if (data->flags & MMC_DATA_READ) command |= 1 << 5;
if (data->flags & MMC_DATA_WRITE) command |= 1 << 6;
data->error = sdc_setup_data_xfer(host, mmc, data);
if (data->error < 0) {
dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, mmc_get_dma_dir(data));
return data->error;
}
xfer = 1;
}
timeout = (uint64_t)mmc->ios.clock * CMD_TIMEOUT_MS / 1000;
host->regs->command = command;
host->regs->cmd_timeout = (uint32_t)timeout;
if (host->regs->cmd_timeout != timeout) host->regs->cmd_timeout = 0;
host->regs->argument = cmd->arg;
sdc_cmd_finish(host, cmd);
if (cmd->error < 0) {
if (xfer) dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, mmc_get_dma_dir(data));
return cmd->error;
}
if (xfer) host->data = data;
return 0;
}
static void sdc_request(struct mmc_host * mmc, struct mmc_request * mrq) {
struct sdc_host * host = mmc_priv(mmc);
/* Clear the error statuses in case this is a retry */
if (mrq->sbc) mrq->sbc->error = 0;
if (mrq->cmd) mrq->cmd->error = 0;
if (mrq->data) mrq->data->error = 0;
if (mrq->stop) mrq->stop->error = 0;
spin_lock_irq(&host->lock);
host->data = NULL;
host->mrq = mrq;
if (!mrq->sbc || sdc_send_cmd(host, mmc, mrq->sbc, NULL) == 0) {
sdc_send_cmd(host, mmc, mrq->cmd, mrq->data);
}
if (host->data == NULL) {
mmc_request_done(mmc, mrq);
host->mrq = NULL;
}
else {
host->regs->dat_int_enable = SDC_DAT_INT_STATUS_TRS | SDC_DAT_INT_STATUS_ERR;
}
spin_unlock_irq(&host->lock);
}
static void sdc_set_ios(struct mmc_host * mmc, struct mmc_ios * ios) {
struct sdc_host * host = mmc_priv(mmc);
spin_lock_irq(&host->lock);
sdc_set_clock(host, ios->clock);
host->regs->control = ios->bus_width == MMC_BUS_WIDTH_4 ? SDC_CONTROL_SD_4BIT : 0;
spin_unlock_irq(&host->lock);
}
static void sdc_reset(struct mmc_host * mmc) {
struct sdc_host * host = mmc_priv(mmc);
uint32_t card_detect = 0;
spin_lock_irq(&host->lock);
sdc_set_clock(host, 400000);
// software reset
host->regs->software_reset = 1;
while ((host->regs->software_reset & 1) == 0) {}
// clear software reset
host->regs->software_reset = 0;
while (host->regs->software_reset != 0) {}
udelay(10000);
// set bus width 1 bit
host->regs->control = 0;
// disable cmd/data interrupts
host->regs->cmd_int_enable = 0;
host->regs->dat_int_enable = 0;
// clear cmd/data interrupts
host->regs->cmd_int_status = 0;
host->regs->dat_int_status = 0;
// enable card detect interrupt
card_detect = host->regs->card_detect;
if (card_detect & SDC_CARD_INSERT_INT_REQ) {
host->regs->card_detect = SDC_CARD_REMOVE_INT_EN;
}
else if (card_detect & SDC_CARD_REMOVE_INT_REQ) {
host->regs->card_detect = SDC_CARD_INSERT_INT_EN;
}
while (host->regs->software_reset != 0) {}
spin_unlock_irq(&host->lock);
}
static void sdc_card_reset(struct mmc_host * mmc) {
struct sdc_host * host = mmc_priv(mmc);
uint32_t control = 0;
spin_lock_irq(&host->lock);
control = host->regs->control;
host->regs->control = control | SDC_CONTROL_SD_RESET;
udelay(10);
host->regs->control = control & ~(uint32_t)SDC_CONTROL_SD_RESET;
udelay(10);
spin_unlock_irq(&host->lock);
}
static int sdc_get_cd(struct mmc_host * mmc) {
struct sdc_host * host = mmc_priv(mmc);
uint32_t card_detect = host->regs->card_detect;
if (card_detect == 0) return 1; /* Card detect not supported */
return (card_detect & SDC_CARD_INSERT_INT_REQ) != 0;
}
static irqreturn_t sdc_isr(int irq, void * dev_id) {
struct mmc_host * mmc = (struct mmc_host *)dev_id;
struct sdc_host * host = mmc_priv(mmc);
uint32_t card_detect = 0;
uint32_t data_status = 0;
unsigned long flags;
spin_lock_irqsave(&host->lock, flags);
card_detect = host->regs->card_detect;
if (card_detect & SDC_CARD_INSERT_INT_REQ) {
if (card_detect & SDC_CARD_INSERT_INT_EN) {
host->regs->card_detect = SDC_CARD_REMOVE_INT_EN;
mmc_detect_change(mmc, 0);
}
}
else if (card_detect & SDC_CARD_REMOVE_INT_REQ) {
if (card_detect & SDC_CARD_REMOVE_INT_EN) {
host->regs->card_detect = SDC_CARD_INSERT_INT_EN;
mmc_detect_change(mmc, 0);
}
}
if ((data_status = host->regs->dat_int_status) != 0) {
host->regs->dat_int_enable = 0;
host->regs->dat_int_status = 0;
while (host->regs->software_reset != 0) {}
if (host->data) {
struct mmc_request * mrq = host->mrq;
struct mmc_data * data = host->data;
if (data_status == SDC_DAT_INT_STATUS_TRS) {
data->bytes_xfered = data->blksz * data->blocks;
}
else {
data->error = -EIO;
if (data_status & SDC_DAT_INT_STATUS_CTE) data->error = -ETIME;
}
if (mrq->stop) sdc_send_cmd(host, mmc, mrq->stop, NULL);
mmc_request_done(mmc, mrq);
dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, mmc_get_dma_dir(data));
host->data = NULL;
host->mrq = NULL;
}
}
spin_unlock_irqrestore(&host->lock, flags);
return IRQ_HANDLED;
}
/*---------------------------------------------------------------------*/
// JACOB: Had to modify this to resemble the older version of Linux
// Used to be called hw_reset in older versions. Now it's
// called .card_hw_reset to make it unambiguous what it's
// resetting. When I update Linux, this will be changed back.
static const struct mmc_host_ops axi_sdc_ops = {
.request = sdc_request,
.set_ios = sdc_set_ios,
.get_cd = sdc_get_cd,
.hw_reset = sdc_card_reset,
};
static int axi_sdc_probe(struct platform_device * pdev) {
struct device * dev = &pdev->dev;
struct resource * iomem;
struct sdc_host * host;
struct mmc_host * mmc;
void __iomem * ioaddr;
uint32_t capability;
int irq;
int ret;
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ioaddr = devm_ioremap_resource(dev, iomem);
if (IS_ERR(ioaddr)) return PTR_ERR(ioaddr);
irq = platform_get_irq(pdev, 0);
if (irq <= 0) return -ENXIO;
mmc = mmc_alloc_host(sizeof(*host), dev);
if (!mmc) return -ENOMEM;
mmc->ops = &axi_sdc_ops;
host = mmc_priv(mmc);
host->pdev = pdev;
host->regs = (struct sdc_regs __iomem *)ioaddr;
host->irq = irq;
ret = of_property_read_u32(dev->of_node, "clock", &host->clk_freq);
if (ret) host->clk_freq = 100000000;
ret = mmc_of_parse(mmc);
if (ret) {
mmc_free_host(mmc);
return ret;
}
if (mmc->f_min == 0) mmc->f_min = host->clk_freq / 0x200; /* maximum clock division 256 * 2 */
if (mmc->f_max == 0) mmc->f_max = host->clk_freq / 2; /* minimum clock division 2 */
if ((mmc->caps2 & MMC_CAP2_NO_SDIO) == 0) {
/* TODO: deprecated 10/19/2022, set in DTS */
mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
mmc->caps2 |= MMC_CAP2_NO_SDIO;
}
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
mmc->max_segs = 1;
mmc->max_req_size = 0x2000000;
mmc->max_seg_size = 0x2000000;
mmc->max_blk_size = 0x1000;
mmc->max_blk_count = 0x10000;
ret = request_irq(host->irq, sdc_isr, IRQF_TRIGGER_HIGH, "fpga-axi-sdc", mmc);
if (ret) {
mmc_free_host(mmc);
return ret;
}
host->dma_addr_bits = 32;
capability = host->regs->capability;
if (capability & SDC_CAPABILITY_ADDR) {
host->dma_addr_bits = (capability & SDC_CAPABILITY_ADDR) >> __builtin_ctz(SDC_CAPABILITY_ADDR);
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(host->dma_addr_bits));
if (ret) {
printk(KERN_ERR "AXI-SDC: Can't set DMA mask\n");
mmc_free_host(mmc);
return ret;
}
}
sdc_reset(mmc);
ret = mmc_add_host(mmc);
if (ret) {
printk(KERN_ERR "AXI-SDC: Can't register device\n");
mmc_free_host(mmc);
return ret;
}
spin_lock_init(&host->lock);
platform_set_drvdata(pdev, host);
return 0;
}
static int axi_sdc_remove(struct platform_device * pdev) {
struct sdc_host * host = platform_get_drvdata(pdev);
struct mmc_host * mmc = mmc_from_priv(host);
free_irq(host->irq, mmc);
mmc_remove_host(mmc);
mmc_free_host(mmc);
return 0;
}
static struct platform_driver axi_sdc_driver = {
.driver = {
.name = "riscv-axi-sdc",
.of_match_table = axi_sdc_of_match_table,
},
.probe = axi_sdc_probe,
.remove = axi_sdc_remove,
};
module_platform_driver(axi_sdc_driver);
MODULE_DESCRIPTION("AXI SD Card driver");
MODULE_AUTHOR("Eugene Tarassov");
MODULE_LICENSE("GPL v2");

View File

@ -0,0 +1,12 @@
diff --git a/package/Config.in b/package/Config.in
index 82b28d2835..29e8bb66ac 100644
--- a/package/Config.in
+++ b/package/Config.in
@@ -469,6 +469,7 @@ endmenu
source "package/fconfig/Config.in"
source "package/flashrom/Config.in"
source "package/fmtools/Config.in"
+ source "package/fpga-axi-sdc/Config.in"
source "package/freescale-imx/Config.in"
source "package/fxload/Config.in"
source "package/gcnano-binaries/Config.in"

File diff suppressed because it is too large Load Diff

9
linux/sdcard/Makefile Normal file
View File

@ -0,0 +1,9 @@
RISCV := /opt/riscv
.PHONY: all clean
all:
./make-img.sh test.img
clean:
rm -f test.img

120
linux/sdcard/flash-sd.sh Executable file
View File

@ -0,0 +1,120 @@
#!/bin/bash
# Exit on any error (return code != 0)
set -e
# Output colors
GREEN='\033[1;32m'
RED='\033[1;31m'
NC='\033[0m'
NAME="$GREEN"${0:2}"$NC"
# File location variables
RISCV=/opt/riscv
IMAGES=$RISCV/buildroot/output/images
FW_JUMP=$IMAGES/fw_jump.bin
LINUX_KERNEL=$IMAGES/Image
DEVICE_TREE=$IMAGES/wally-vcu108.dtb
# Mount Directory
MNT_DIR=wallyimg
if [ "$#" -eq "0" ] ; then
echo "$NAME: $RED ERROR $NC: You must supply the SD card device."
echo "usage: ./flash-sd.sh <sd device> <mount directory>"
exit 1
fi
if [ ! -e "$1" ] ; then
echo "$NAME:$RED ERROR $NC: SD card device does not exist."
exit 1
fi
if [ ! -z "$2" ] ; then
MNT_DIR=$2
fi
# If images are not built, exit
if [ ! -e $FW_JUMP ] || [ ! -e $LINUX_KERNEL ] ; then
echo 'ERROR: Missing images in buildroot output directory.'
echo ' Build images before running this script.'
exit 1
fi
if [ ! -e $DEVICE_TREE ] ; then
echo 'ERROR: Missing device tree file'
exit 1
fi
# Size of OpenSBI and the Kernel in 512B blocks
DST_SIZE=$(ls -la --block-size=512 $DEVICE_TREE | cut -d' ' -f 5 )
FW_JUMP_SIZE=$(ls -la --block-size=512 $FW_JUMP | cut -d' ' -f 5 )
KERNEL_SIZE=$(ls -la --block-size=512 $LINUX_KERNEL | cut -d' ' -f 5 )
# Start sectors of OpenSBI and Kernel Partitions
FW_JUMP_START=$(( 34 + $DST_SIZE ))
KERNEL_START=$(( $FW_JUMP_START + $FW_JUMP_SIZE ))
FS_START=$(( $KERNEL_START + $KERNEL_SIZE ))
# Print out the sizes of the binaries in 512B blocks
echo -e "$NAME: Device tree block size: $DST_SIZE"
echo -e "$NAME: OpenSBI FW_JUMP block size: $FW_JUMP_SIZE"
echo -e "$NAME: Kernel block size: $KERNEL_SIZE"
read -p "Warning: " -n 1 -r
echo
if [[ $REPLY =~ ^[Yy]$ ]] ; then
# Make empty image
#echo -e "$NAME: Creating blank image"
#sudo dd if=/dev/zero of=$1 bs=4k conv=noerror status=progress && sync
# GUID Partition Tables (GPT)
# ===============================================
# -g Converts any existing mbr record to a gpt record
# --clear clears any GPT partition table that already exists.
# --set-alignment=1 that we want to align partition starting sectors
# to 1 sector boundaries I think? This would normally be set to 2048
# apparently.
# sudo sgdisk -g --clear --set-alignment=1 \
# --new=1:34:+$FW_JUMP_SIZE: --change-name=1:'opensbi' --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985 \
# --new=2:$KERNEL_START:+$KERNEL_SIZE --change-name=2:'kernel' --typecode=2:3000 \
# --new=3:$FS_START:-0 --change-name=3:'filesystem' \
# $1
echo -e "$NAME: Creating GUID Partition Table"
sudo sgdisk -g --clear --set-alignment=1 \
--new=1:34:+$DST_SIZE: --change-name=1:'fdt' \
--new=2:$FW_JUMP_START:+$FW_JUMP_SIZE --change-name=2:'opensbi' --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985 \
--new=3:$KERNEL_START:+$KERNEL_SIZE --change-name=3:'kernel' \
--new=4:$FS_START:-0 --change-name=4:'filesystem' \
$1
sudo partprobe $1
echo -e "$NAME: Copying binaries into their partitions."
DD_FLAGS="bs=4k iflag=fullblock oflag=direct conv=fsync status=progress"
echo -e "$NAME: Copying device tree"
sudo dd if=$DEVICE_TREE of="$1"1 $DD_FLAGS
echo -e "$NAME: Copying OpenSBI"
sudo dd if=$FW_JUMP of="$1"2 $DD_FLAGS
echo -e "$NAME: Copying Kernel"
sudo dd if=$LINUX_KERNEL of="$1"3 $DD_FLAGS
sudo mkfs.ext4 "$1"4
sudo mkdir /mnt/$MNT_DIR
sudo mount -v "$1"4 /mnt/$MNT_DIR
sudo umount -v /mnt/$MNT_DIR
sudo rmdir /mnt/$MNT_DIR
#sudo losetup -d $LOOPDEVICE
fi
echo
echo "GPT Information for $1 ==================================="
sgdisk -p $1

110
linux/sdcard/make-img.sh Executable file
View File

@ -0,0 +1,110 @@
#!/bin/bash
# Exit on any error (return code != 0)
set -e
# Output colors
GREEN='\033[1;32m'
NC='\033[0m'
NAME="$GREEN"${0:2}"$NC"
# File location variables
RISCV=/opt/riscv
IMAGES=$RISCV/buildroot/output/images
FW_JUMP=$IMAGES/fw_jump.bin
LINUX_KERNEL=$IMAGES/Image
DEVICE_TREE=$IMAGES/wally-vcu108.dtb
# Mount Directory
MNT_DIR=wallyimg
if [ ! -z "$2" ] ; then
MNT_DIR=$2
fi
# If images are not built, exit
if [ ! -e $FW_JUMP ] || [ ! -e $LINUX_KERNEL ] ; then
echo 'ERROR: Missing images in buildroot output directory.'
echo ' Build images before running this script.'
exit 1
fi
if [ ! -e $DEVICE_TREE ] ; then
echo 'ERROR: Missing device tree file'
exit 1
fi
# Size of OpenSBI and the Kernel in 512B blocks
DST_SIZE=$(ls -la --block-size=512 $DEVICE_TREE | cut -d' ' -f 5 )
FW_JUMP_SIZE=$(ls -la --block-size=512 $FW_JUMP | cut -d' ' -f 5 )
KERNEL_SIZE=$(ls -la --block-size=512 $LINUX_KERNEL | cut -d' ' -f 5 )
# Start sectors of OpenSBI and Kernel Partitions
FW_JUMP_START=$(( 34 + $DST_SIZE ))
KERNEL_START=$(( $FW_JUMP_START + $FW_JUMP_SIZE ))
FS_START=$(( $KERNEL_START + $KERNEL_SIZE ))
# Print out the sizes of the binaries in 512B blocks
echo -e "$NAME: Device tree block size: $DST_SIZE"
echo -e "$NAME: OpenSBI FW_JUMP block size: $FW_JUMP_SIZE"
echo -e "$NAME: Kernel block size: $KERNEL_SIZE"
if [ ! -e $1 ] ; then
# Make empty image
echo -e "$NAME: Creating blank image"
sudo dd if=/dev/zero of=$1 bs=1M count=1536
# GUID Partition Tables (GPT)
# ===============================================
# -g Converts any existing mbr record to a gpt record
# --clear clears any GPT partition table that already exists.
# --set-alignment=1 that we want to align partition starting sectors
# to 1 sector boundaries I think? This would normally be set to 2048
# apparently.
# sudo sgdisk -g --clear --set-alignment=1 \
# --new=1:34:+$FW_JUMP_SIZE: --change-name=1:'opensbi' --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985 \
# --new=2:$KERNEL_START:+$KERNEL_SIZE --change-name=2:'kernel' --typecode=2:3000 \
# --new=3:$FS_START:-0 --change-name=3:'filesystem' \
# $1
echo -e "$NAME: Creating GUID Partition Table"
sudo sgdisk -g --clear --set-alignment=1 \
--new=1:34:+$DST_SIZE: --change-name=1:'fdt' \
--new=2:$FW_JUMP_START:+$FW_JUMP_SIZE --change-name=2:'opensbi' --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985 \
--new=3:$KERNEL_START:+$KERNEL_SIZE --change-name=3:'kernel' \
--new=4:$FS_START:-0 --change-name=4:'filesystem' \
$1
LOOPDEVICE=$(sudo losetup -f)
echo -e "$NAME: Loop device: $LOOPDEVICE"
sudo losetup --partscan $LOOPDEVICE $1
echo -e "$NAME: Copying binaries into their partitions."
DD_FLAGS="bs=4k iflag=fullblock oflag=direct conv=fsync status=progress"
# Store device tree in device tree partition
echo -e "$NAME: Copying device tree"
sudo dd if=$DEVICE_TREE of="$LOOPDEVICE"p1 $DD_FLAGS
echo -e "$NAME: Copying OpenSBI"
sudo dd if=$FW_JUMP of="$LOOPDEVICE"p2 $DD_FLAGS
echo -e "$NAME: Copying Kernel"
sudo dd if=$LINUX_KERNEL of="$LOOPDEVICE"p3 $DD_FLAGS
sudo mkfs.ext4 "$LOOPDEVICE"p4
sudo mkdir /mnt/$MNT_DIR
sudo mount -v "$LOOPDEVICE"p4 /mnt/$MNT_DIR
sudo umount -v /mnt/$MNT_DIR
sudo rmdir /mnt/$MNT_DIR
sudo losetup -d $LOOPDEVICE
fi
echo
echo "GPT Information for $1 ==================================="
sgdisk -p $1

View File

@ -96,6 +96,7 @@ module rom1p1r #(parameter ADDR_WIDTH = 8,
ROM[41] = 64'h40a7853b4015551b;
ROM[42] = 64'h808210a7a02367c9;*/
/*
ROM[0] = 64'h8001819300002197;
ROM[1] = 64'h4281420141014081;
ROM[2] = 64'h4481440143814301;
@ -226,6 +227,151 @@ module rom1p1r #(parameter ADDR_WIDTH = 8,
ROM[127]= 64'h2000059346014681;
ROM[128]= 64'h56e3cb5ff0ef4541;
ROM[129]= 64'h00000000b711f005;
*/
ROM[0]=64'h8001819300002197;
ROM[1]=64'h4281420141014081;
ROM[2]=64'h4481440143814301;
ROM[3]=64'h4681460145814501;
ROM[4]=64'h4881480147814701;
ROM[5]=64'h4a814a0149814901;
ROM[6]=64'h4c814c014b814b01;
ROM[7]=64'h4e814e014d814d01;
ROM[8]=64'h0110011b4f814f01;
ROM[9]=64'h059b45011161016e;
ROM[10]=64'h0004063705fe0010;
ROM[11]=64'h1f6000ef8006061b;
ROM[12]=64'h0ff003930000100f;
ROM[13]=64'h4e952e3110060e37;
ROM[14]=64'hc602829b0053f2b7;
ROM[15]=64'h2023fe02dfe312fd;
ROM[16]=64'h829b0053f2b7007e;
ROM[17]=64'hfe02dfe312fdc602;
ROM[18]=64'h4de31efd000e2023;
ROM[19]=64'h059bf1402573fdd0;
ROM[20]=64'h0000061705e20870;
ROM[21]=64'h0010029b01260613;
ROM[22]=64'h68110002806702fe;
ROM[23]=64'h0085179bf0080813;
ROM[24]=64'h038008130107f7b3;
ROM[25]=64'h480508a86c632781;
ROM[26]=64'h1533357902a87963;
ROM[27]=64'h38030000181700a8;
ROM[28]=64'h1c6301057833f268;
ROM[29]=64'h081a403018370808;
ROM[30]=64'h0105783342280813;
ROM[31]=64'h1815751308081063;
ROM[32]=64'h00367513c295e14d;
ROM[33]=64'h654ded510207e793;
ROM[34]=64'hc1701ff00613f130;
ROM[35]=64'h0637c530fff6861b;
ROM[36]=64'h664dcd10167d0200;
ROM[37]=64'h17fd001007b7c25c;
ROM[38]=64'h859b5a5cc20cd21c;
ROM[39]=64'h02062a23dfed0007;
ROM[40]=64'h4785fffd561c664d;
ROM[41]=64'h4501461c06f59063;
ROM[42]=64'h4a1cc35c465cc31c;
ROM[43]=64'he29dc75c4a5cc71c;
ROM[44]=64'h0c63086008138082;
ROM[45]=64'h1ae30a9008130105;
ROM[46]=64'hb7710017e793f905;
ROM[47]=64'he793b75901d7e793;
ROM[48]=64'h5f5c674db7410197;
ROM[49]=64'h66cd02072e23dffd;
ROM[50]=64'hfff78513ff7d5698;
ROM[51]=64'h40a0053300a03533;
ROM[52]=64'hbfb100a7e7938082;
ROM[53]=64'he0a2715d8082557d;
ROM[54]=64'he486f052f44ef84a;
ROM[55]=64'hfa13e85aec56fc26;
ROM[56]=64'h843289ae892a0086;
ROM[57]=64'h00959993000a1463;
ROM[58]=64'h864ac4396b054a85;
ROM[59]=64'h0009859b4549870a;
ROM[60]=64'h0004049b05540363;
ROM[61]=64'h86a66485008b7363;
ROM[62]=64'h870a87aaec7ff0ef;
ROM[63]=64'h4531458146014681;
ROM[64]=64'hf0ef0207c9639c05;
ROM[65]=64'h17820094979beb1f;
ROM[66]=64'h873e020541639381;
ROM[67]=64'h993e99ba020a1963;
ROM[68]=64'h870aa8094501f85d;
ROM[69]=64'he8bff0ef45454685;
ROM[70]=64'h60a64505fe0559e3;
ROM[71]=64'h79a2794274e26406;
ROM[72]=64'h61616b426ae27a02;
ROM[73]=64'h9301020497138082;
ROM[74]=64'hf40647057179b7f1;
ROM[75]=64'hd79867cdec26f022;
ROM[76]=64'hdff58b85571c674d;
ROM[77]=64'h2423d35c03600793;
ROM[78]=64'hfffd571c674d0207;
ROM[79]=64'h0007a737b00026f3;
ROM[80]=64'hb00027f311f70713;
ROM[81]=64'h674dfef77de38f95;
ROM[82]=64'h4f5ccf9d8b895b1c;
ROM[83]=64'h26f3cf5c0027e793;
ROM[84]=64'h071305f5e737b000;
ROM[85]=64'h8f95b00027f30ff7;
ROM[86]=64'h4f5c674dfef77de3;
ROM[87]=64'hb00026f3cf5c9bf5;
ROM[88]=64'h67f7071300989737;
ROM[89]=64'h7de38f95b00027f3;
ROM[90]=64'h458146014681fef7;
ROM[91]=64'hddbff0ef4501870a;
ROM[92]=64'h059346014681870a;
ROM[93]=64'hdcbff0ef45211aa0;
ROM[94]=64'h1aa007134782e939;
ROM[95]=64'h816393d117d24411;
ROM[96]=64'h85220ff0041302e7;
ROM[97]=64'h614564e270a27402;
ROM[98]=64'h46e3da5ff0efa0cd;
ROM[99]=64'h0207c7634782fe05;
ROM[100]=64'h458146014681870a;
ROM[101]=64'hd8bff0ef03700513;
ROM[102]=64'h46014681870a87aa;
ROM[103]=64'h0a900513403005b7;
ROM[104]=64'h4409bf7dfc07d9e3;
ROM[105]=64'hc3998b8583f9bfe1;
ROM[106]=64'h4681870a00846413;
ROM[107]=64'hf0ef450945814601;
ROM[108]=64'h870afa0540e3d59f;
ROM[109]=64'h123405b746014681;
ROM[110]=64'h46e3d45ff0ef450d;
ROM[111]=64'h870a77c14482f805;
ROM[112]=64'h85a6460146818cfd;
ROM[113]=64'h4ae3d2dff0ef451d;
ROM[114]=64'hd3d8470567cdf605;
ROM[115]=64'h000f4737b00026f3;
ROM[116]=64'hb00027f323f70713;
ROM[117]=64'h67cdfef77de38f95;
ROM[118]=64'h4681870a0007ae23;
ROM[119]=64'h0370051385a64601;
ROM[120]=64'hf2054fe3cf7ff0ef;
ROM[121]=64'h458146014681870a;
ROM[122]=64'hce3ff0ef08600513;
ROM[123]=64'h4681870af20545e3;
ROM[124]=64'h4541200005934601;
ROM[125]=64'hf0055de3ccfff0ef;
ROM[126]=64'h3023bf010113bf09;
ROM[127]=64'h4605842a86aa4081;
ROM[128]=64'h40113423850a4585;
ROM[129]=64'h86a265a6da5ff0ef;
ROM[130]=64'hd99ff0ef04084605;
ROM[131]=64'h2201358322813603;
ROM[132]=64'h86a2260508700513;
ROM[133]=64'hd81ff0ef05629e0d;
ROM[134]=64'h2a0135832a813603;
ROM[135]=64'h9e0d86a226054505;
ROM[136]=64'h3603d6bff0ef057e;
ROM[137]=64'h0513320135833281;
ROM[138]=64'h9e0d86a226054010;
ROM[139]=64'h3083d53ff0ef0556;
ROM[140]=64'h4501400134034081;
ROM[141]=64'h0000808241010113;
end // initial begin
end // if (PRELOAD_ENABLED)
end

View File

@ -87,7 +87,7 @@ delay2:
# jump to the copied contents of the sd card.
jumpToLinux:
csrrs a0, 0xF14, x0 # copy hard ID to a0
csrrs a0, 0xF14, x0 # copy hart ID to a0
li a1, 0x87000000 # end of memory? not 100% sure on this but it's 112MB
la a2, end_of_bios
li t0, 0x80000000 # start of code

View File

@ -15,9 +15,9 @@ typedef QWORD LBA_t;
// These locations are copied from the generic configuration
// of OpenSBI. These addresses can be found in:
// buildroot/output/build/opensbi-0.9/platform/generic/config.mk
#define FDT_ADDRESS 0x80200000 // FW_JUMP_FDT_ADDR
#define FDT_ADDRESS 0x87000000 // FW_JUMP_FDT_ADDR
#define OPENSBI_ADDRESS 0x80000000 // FW_TEXT_START
#define KERNEL_ADDRESS 0x82200000 // FW_JUMP_ADDR
#define KERNEL_ADDRESS 0x80200000 // FW_JUMP_ADDR
// Export disk_read
int disk_read(BYTE * buf, LBA_t sector, UINT count, BYTE card_type);