Harshini Srinath ccb81c84f4 Update pmachecker.sv ... Program clean up		2023-06-12 18:39:36 -07:00
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cache	Update subcachelineread.sv	2023-06-09 08:50:51 -07:00
ebu	Update controllerinput.sv	2023-06-10 18:26:06 -07:00
fpu	Update unpackinput.sv	2023-06-11 17:09:11 -07:00
generic	Update prioritythermometer.sv	2023-06-11 19:18:21 -07:00
hazard	MDU and hazard unit now also parameterized. Based on Lim's work. Again I want to clarify this their work. Not mine. I'm just doing this because the merge had an issue.	2023-05-24 15:01:35 -05:00
ieu	Update shifter.sv	2023-06-12 12:23:45 -07:00
ifu	Update spill.sv	2023-06-12 12:50:11 -07:00
lsu	Update swbytemask.sv	2023-06-12 13:37:35 -07:00
mdu	Update mul.sv	2023-06-12 14:00:37 -07:00
mmu	Update pmachecker.sv	2023-06-12 18:39:36 -07:00
privileged	Found the coremark performance issue. The testbench was continuously forcing the BTB to all zeros. Once fixed it resolved the performance problem.	2023-06-05 15:42:05 -05:00
uncore	Updated source code to be compatible with verilator 5.011 for lint only.	2023-05-31 10:44:23 -05:00
wally	Updated parameterization types. Modelsim version 2022.1 did requires defaults to a 32 bit integer. The base and ranges for the address decoder need to be larger.	2023-06-09 09:28:24 -05:00