Rose Thompson
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943f6b680e
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LSU cleanup.
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2024-10-02 17:38:22 -05:00 |
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Rose Thompson
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f603d21826
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Updated my name in multiple locations.
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2024-08-21 10:50:39 -07:00 |
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David Harris
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010038ec32
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Depricate conditional generation based on A_SUPPORTED, which is now computed from ZALRSC_SUPPORTED and ZAAMO_SUPPORTED
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2024-08-08 05:27:35 -07:00 |
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David Harris
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0ab3f28991
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Lint cleanup
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2024-06-20 00:10:03 -07:00 |
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Ross Thompson
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24916d42e2
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Refactored TLBMiss and TLBMissOrUpdateA(D) to simplify spill, ifu, lsu, and hptw.
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2024-06-19 11:40:02 -07:00 |
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Ross Thompson
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77523c52c2
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LSU no longer has ***.
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2024-06-19 10:56:07 -07:00 |
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Ross Thompson
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5e5ca0809f
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Removed more *** from lsu and updated assertions for dtim.
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2024-06-19 10:52:51 -07:00 |
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Ross Thompson
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4911642427
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Removed *** and updated comments for bpred and align.
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2024-06-19 10:31:44 -07:00 |
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Ross Thompson
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ab1ee3d69b
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Removed *** from IFU, lrcs.
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2024-06-19 09:40:35 -07:00 |
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David Harris
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cb563e8018
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Clean up unused signals
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2024-06-18 08:07:14 -07:00 |
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David Harris
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cac67aae4f
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Lint cleanup
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2024-06-18 05:58:54 -07:00 |
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David Harris
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53477b2c85
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Code cleanup
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2024-06-14 07:08:17 -07:00 |
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David Harris
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8f09240e6c
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Simplified outdated documentation pointers
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2024-06-14 03:42:15 -07:00 |
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Rose Thompson
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84946919a4
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Changed name CacheWriteData to WriteData.
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2024-05-28 18:00:39 -05:00 |
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Rose Thompson
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273b41df99
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Changed name of cache parameter NUMLINES to NUMSETS to better match book.
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2024-05-28 17:55:43 -05:00 |
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David Harris
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77137f0f60
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ZAAMO and ZALRSC implemented but not tested
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2024-05-07 16:45:49 -07:00 |
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David Harris
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c0afb44ed4
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Tied dangling signals to 0 for some configs to make VCS lint happy
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2024-04-28 22:50:36 -07:00 |
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David Harris
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3f195884e9
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Defined bit sizes more precisely to help VCS lint and conform to coding style
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2024-04-21 08:40:11 -07:00 |
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David Harris
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fc158689ad
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Shared amoalu max/min comparator hardware and removed input sign extend muxes
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2024-03-24 17:15:46 -07:00 |
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David Harris
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f0b29d3083
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AMO max/min comparator optimization
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2024-03-24 17:05:32 -07:00 |
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Kunlin Han
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22b59138f0
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Remove all #delay from non-testbench.
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2024-03-16 11:20:32 -07:00 |
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Kunlin Han
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8c67a76912
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Remove all #delay from non-testbench.
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2024-03-13 10:31:40 -07:00 |
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Rose Thompson
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54c1d28c8b
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Fixed missing case in the align AccesByteOffset Mux.
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2024-03-06 15:43:55 -06:00 |
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Rose Thompson
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0d8c251fa4
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-03-06 15:35:34 -06:00 |
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Rose Thompson
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2f94be5e79
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Revert "Optimized the align logic for loads."
This reverts commit 1fd678b433.
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2024-03-06 15:19:17 -06:00 |
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Rose Thompson
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57aab52dc2
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Revert "Partially working optimized subwordwrite for misaligned."
This reverts commit dac8fc16af.
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2024-03-06 15:17:57 -06:00 |
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Rose Thompson
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9668fdd868
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Revert "Closer to getting subword write misaligned working."
This reverts commit 6a9c2d8dc4.
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2024-03-06 15:16:43 -06:00 |
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Rose Thompson
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dce7de59a3
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Revert "Non-ideal fix. Added new output from pma which indicates if the write shift should occur."
This reverts commit 3714b2bf4a.
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2024-03-06 15:16:37 -06:00 |
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Rose Thompson
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a48c16c0ef
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Revert "Swapped to the more compact subwordreadmisaligned.sv."
This reverts commit 1ece6f8eae.
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2024-03-06 15:16:32 -06:00 |
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Rose Thompson
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f752b5dd37
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Revert "Beginning subword cleanup."
This reverts commit 7e1ea1e6d9.
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2024-03-06 15:16:24 -06:00 |
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Rose Thompson
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a8024eee26
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Revert "Updated subword misaligned."
This reverts commit 69d31d50e2.
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2024-03-06 15:16:16 -06:00 |
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Rose Thompson
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298028b119
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Revert "Cleanup."
This reverts commit 45c30267a5.
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2024-03-06 15:16:03 -06:00 |
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Rose Thompson
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739e73ef81
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Revert "Siginficant cleanup of subwordwritemisaligned."
This reverts commit fbc18abaa0.
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2024-03-06 15:15:58 -06:00 |
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Rose Thompson
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e7ec2bedd4
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Revert "Simplifications of subword code."
This reverts commit a402883115.
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2024-03-06 15:15:51 -06:00 |
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Rose Thompson
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b64b883129
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Revert "Removed duplicate endianswap."
This reverts commit caac48b7f2.
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2024-03-06 15:15:43 -06:00 |
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Rose Thompson
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5447159cfd
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Revert "Cleanup."
This reverts commit e84b7cc147.
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2024-03-06 15:15:26 -06:00 |
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Rose Thompson
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2ea0134329
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Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned."
This reverts commit cba3209e7f.
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2024-03-06 13:28:59 -06:00 |
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Rose Thompson
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068ffda5fb
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Revert "Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned.""
This reverts commit 8136b45ca7.
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2024-03-06 13:28:47 -06:00 |
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David Harris
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b386331cc8
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Changed '0 to 0 where possible per Chapter 4 style guidelines
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2024-03-06 05:48:17 -08:00 |
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David Harris
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86956026dc
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Further simplified subwordread muxing
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2024-03-06 04:24:31 -08:00 |
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Kevin Kim
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9d73e5bd0d
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lsu supports quad enabled subwordreads
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2024-03-05 17:07:39 -08:00 |
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Rose Thompson
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a22de45631
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Removed unused storedelay from align.
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2024-03-02 16:20:31 -06:00 |
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Rose Thompson
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8136b45ca7
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Revert "Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned."
This reverts commit cba3209e7f.
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2024-03-02 11:55:43 -06:00 |
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Rose Thompson
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cba3209e7f
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Trying an experiment. Use the less compact subwordreaddouble in the fpga synthesize rather than subwordreadmisaligned.
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2024-03-02 11:38:33 -06:00 |
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Rose Thompson
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ab750e150f
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Fixed lint errors for alignment.
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2024-02-23 14:00:19 -06:00 |
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Rose Thompson
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e84b7cc147
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Cleanup.
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2024-02-23 13:00:21 -06:00 |
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Rose Thompson
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caac48b7f2
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Removed duplicate endianswap.
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2024-02-23 09:42:39 -06:00 |
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Rose Thompson
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a402883115
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Simplifications of subword code.
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2024-02-23 09:41:59 -06:00 |
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Rose Thompson
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fbc18abaa0
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Siginficant cleanup of subwordwritemisaligned.
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2024-02-22 14:17:15 -06:00 |
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Rose Thompson
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45c30267a5
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Cleanup.
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2024-02-22 14:08:04 -06:00 |
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