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								 Jordan Carlin | f0c5d6e4e7 | Merge branch 'main' of https://github.com/openhwgroup/cvw into script_updates | 2024-08-25 12:14:25 -07:00 |  | 
			
				
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								 David Harris | 86aaf43306 | Merge pull request #928 from ross144/main Update FPGA constraints to restore support for VCU108 and increase speed to 50MHz | 2024-08-24 18:45:55 -07:00 |  | 
			
				
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								 Rose Thompson | ea181a2ba3 | Merge branch 'main' of github.com:openhwgroup/cvw | 2024-08-23 17:37:14 -07:00 |  | 
			
				
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								 Rose Thompson | ee1e09a6a2 | VCU108 now boot linux at 50MHz! | 2024-08-23 17:18:47 -07:00 |  | 
			
				
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								 Rose Thompson | 14083bc642 | VCU108 is not synthesizing at 50MHz. Still running into a few problems with the new SPI sd card device. | 2024-08-23 16:17:15 -07:00 |  | 
			
				
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								 Rose Thompson | 842aea157c | Updated vc108 constraints for spi based sd card and setting 50 Mhz. | 2024-08-23 15:59:11 -07:00 |  | 
			
				
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								 Rose Thompson | 167878aee4 | Commet out debug code in fpga synth script. | 2024-08-23 14:46:01 -07:00 |  | 
			
				
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								 Rose Thompson | b471913d9f | On the way to making vcu108 work again. | 2024-08-23 14:45:22 -07:00 |  | 
			
				
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								 Rose Thompson | 4d56b3ca96 | Maybe improvements to fpga synthesis. | 2024-08-23 13:00:22 -07:00 |  | 
			
				
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								 David Harris | aba4caa108 | Merge pull request #927 from 10x-Engineers/rvvi_setup Removing warnings from questa simulation | 2024-08-23 06:34:35 -07:00 |  | 
			
				
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								 Huda-10xe | da2c9a5dc5 | Removing warnings from questa simulation | 2024-08-23 12:37:42 +05:00 |  | 
			
				
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								 Rose Thompson | fc80bf1251 | More updates to fpga IP module names. | 2024-08-22 14:31:39 -07:00 |  | 
			
				
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								 Rose Thompson | 8d40a0a092 | Changed names of fpga IP modules to match textbook.  Updated boot.h to use the correct clock speed for #DEFINE for UART in the zero stage
bootloader. | 2024-08-22 13:56:50 -07:00 |  | 
			
				
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								 David Harris | b4bcd7b0b1 | Merge pull request #926 from ross144/main Fix my name on multiple files and other minor changes | 2024-08-22 03:23:17 -07:00 |  | 
			
				
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								 Rose Thompson | 418bc6b23c | Merge branch 'main' of github.com:openhwgroup/cvw | 2024-08-21 16:24:10 -07:00 |  | 
			
				
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								 Rose Thompson | 1f57fd6343 | Fixed bug in Makefile. | 2024-08-21 16:04:21 -07:00 |  | 
			
				
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								 Rose Thompson | 249db9cf45 | Merge pull request #925 from JacobPease/main Update PREADY signal to not stall during transmission on reads to read only registers. | 2024-08-21 12:44:57 -07:00 |  | 
			
				
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								 Rose Thompson | f5d754d2a5 | Updated to point to latest commit of cvw-arch-verif. | 2024-08-21 11:02:23 -07:00 |  | 
			
				
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								 Rose Thompson | 6be30369f1 | Merge branch 'main' of github.com:openhwgroup/cvw | 2024-08-21 11:02:23 -07:00 |  | 
			
				
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								 Rose Thompson | faffecf891 | Merge branch 'main' of github.com:openhwgroup/cvw | 2024-08-21 11:02:17 -07:00 |  | 
			
				
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								 Rose Thompson | 01b623b8c4 | Merge branch 'main' of github.com:openhwgroup/cvw | 2024-08-21 11:02:08 -07:00 |  | 
			
				
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								 Rose Thompson | ae8c2f26c6 | Fixed wave file to add back the function name. | 2024-08-21 10:51:32 -07:00 |  | 
			
				
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								 Rose Thompson | 113d71f1a0 | More name updates. | 2024-08-21 10:51:24 -07:00 |  | 
			
				
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								 Rose Thompson | f603d21826 | Updated my name in multiple locations. | 2024-08-21 10:50:39 -07:00 |  | 
			
				
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								 Jacob Pease | 938879c5a4 | Update PREADY signal to not stall during transmission on reads to read only registers. | 2024-08-21 12:39:01 -05:00 |  | 
			
				
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								 David Harris | 6f19ad554f | Merge pull request #923 from 10x-Engineers/rvvi_setup Adding regression for RVVI FC | 2024-08-21 05:22:38 -07:00 |  | 
			
				
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								 David Harris | 67c7a559c3 | Merge pull request #923 from 10x-Engineers/rvvi_setup Adding regression for RVVI FC | 2024-08-21 05:22:38 -07:00 |  | 
			
				
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								 Huda-10xe | b315a8e338 | Adding regression commands to Makefile | 2024-08-21 15:45:23 +05:00 |  | 
			
				
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								 Huda-10xe | ca21b865b3 | Adding regression commands to Makefile | 2024-08-21 15:45:23 +05:00 |  | 
			
				
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								 Rose Thompson | 4b7a498ada | Merge pull request #922 from JacobPease/main SPI Clock Polarity and Phase fixes | 2024-08-20 14:54:53 -07:00 |  | 
			
				
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								 Rose Thompson | 91a41ed791 | Merge pull request #922 from JacobPease/main SPI Clock Polarity and Phase fixes | 2024-08-20 14:54:53 -07:00 |  | 
			
				
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								 Jacob Pease | b7edffdfd4 | Removed now inaccurate comments. | 2024-08-20 16:38:15 -05:00 |  | 
			
				
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								 Jacob Pease | f960662e93 | Removed now inaccurate comments. | 2024-08-20 16:38:15 -05:00 |  | 
			
				
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								 Jacob Pease | 77d75f34f8 | Merge branch 'main' of github.com:openhwgroup/cvw | 2024-08-20 16:24:46 -05:00 |  | 
			
				
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								 Jacob Pease | cacd0063d7 | Merge branch 'main' of github.com:openhwgroup/cvw | 2024-08-20 16:24:46 -05:00 |  | 
			
				
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								 Jacob Pease | d8b75440b6 | With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests. | 2024-08-20 16:24:37 -05:00 |  | 
			
				
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								 Jacob Pease | baad4e0fd2 | With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests. | 2024-08-20 16:24:37 -05:00 |  | 
			
				
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								 Jacob Pease | 43b17b5058 | Update SPI peripheral to accept writes to FIFO always. Worked on this together with Naiche and Rose. | 2024-08-20 14:40:50 -05:00 |  | 
			
				
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								 Jacob Pease | 9ac889e3e8 | Update SPI peripheral to accept writes to FIFO always. Worked on this together with Naiche and Rose. | 2024-08-20 14:40:50 -05:00 |  | 
			
				
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								 Rose Thompson | a810ef8513 | Merge pull request #920 from JacobPease/main Added dynamic SDC Clock selector in bootloader code. | 2024-08-20 10:23:13 -07:00 |  | 
			
				
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								 Rose Thompson | 5e61e9339d | Merge pull request #920 from JacobPease/main Added dynamic SDC Clock selector in bootloader code. | 2024-08-20 10:23:13 -07:00 |  | 
			
				
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								 Jacob Pease | 9fae5dfc0a | Added dynamic SDC Clock selector in bootloader code. | 2024-08-20 12:19:49 -05:00 |  | 
			
				
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								 Jacob Pease | 4a1abb1d17 | Added dynamic SDC Clock selector in bootloader code. | 2024-08-20 12:19:49 -05:00 |  | 
			
				
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								 David Harris | f4871c14f7 | Merge pull request #918 from jordancarlin/fp_tests_make Testfloat vector generation refactoring + root Makefile cleanup | 2024-08-17 04:32:45 -07:00 |  | 
			
				
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								 David Harris | d3621318c0 | Merge pull request #918 from jordancarlin/fp_tests_make Testfloat vector generation refactoring + root Makefile cleanup | 2024-08-17 04:32:45 -07:00 |  | 
			
				
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								 David Harris | ef7028154c | Merge pull request #873 from Shreesh-Kulkarni/main Modified riscv-isacov and riscv-ctg files to support some missing quad instructions. | 2024-08-16 11:10:35 -07:00 |  | 
			
				
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								 David Harris | 32a8a6b3d1 | Merge pull request #873 from Shreesh-Kulkarni/main Modified riscv-isacov and riscv-ctg files to support some missing quad instructions. | 2024-08-16 11:10:35 -07:00 |  | 
			
				
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								 Rose Thompson | 362d4313a3 | Merge pull request #919 from jordancarlin/riscof_jobs Set RISCOF jobs based on number of cores | 2024-08-16 08:53:39 -07:00 |  | 
			
				
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								 Rose Thompson | ba3a2c27a7 | Merge pull request #919 from jordancarlin/riscof_jobs Set RISCOF jobs based on number of cores | 2024-08-16 08:53:39 -07:00 |  | 
			
				
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								 Jordan Carlin | e98330bcdf | Merge branch 'main' of https://github.com/openhwgroup/cvw into script_updates | 2024-08-15 19:10:51 -07:00 |  |