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597 Commits

Author SHA1 Message Date
David Harris
d9003da8e0 Moved some tests to wally-riscv-arch-test list that are simulated 2024-01-30 10:28:51 -08:00
David Harris
45e2317636 Added Wally github address to header comments 2024-01-29 05:38:11 -08:00
David Harris
3620a10c0b Improved hptw and I CacheWays coverage 2024-01-26 14:55:51 -08:00
David Harris
1c1d3eb956 HPTW coverage improvements 2024-01-26 10:46:38 -08:00
David Harris
2449e06e55 Fixed FPU coverage, solved Issue 596 by misaligned AMO throwing access fault when misaligned non-amo are supported 2024-01-25 21:03:41 -08:00
David Harris
0e1c53f9f6 Fixed tlbmisc testing with PBMTE = 0 2024-01-24 12:24:33 -08:00
David Harris
66a1edb261 More coverage touchup 2024-01-23 23:11:49 -08:00
David Harris
7215f48dda coverage improvements: fixing problems running ImperasDV on coverage tests 2024-01-23 22:21:01 -08:00
David Harris
d5f497eec5 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-01-22 09:56:50 -08:00
Jordan Carlin
0c13e14bbf coverage improvements for mret when mpp = 3; update imperas config 2024-01-22 09:52:58 -08:00
David Harris
4ffa5e7b0a Coverage improvements 2024-01-22 09:49:24 -08:00
Jordan Carlin
4936496bb9 fix sfence.inval.ir and sret coverage from previous PR 2024-01-22 08:58:31 -08:00
David Harris
171430a695 FPU and PMP tests 2024-01-21 14:41:22 -08:00
David Harris
ff055c404c fpu coverage improvements 2024-01-21 13:17:56 -08:00
David Harris
69218b4b86 Coverage improvements 2024-01-21 10:03:07 -08:00
David Harris
9260d3c424 Add Zfh support to imperas.ic, use Zicond in riscof now that it is fixed in riscv-arch-test 2024-01-18 22:46:07 -08:00
David Harris
13de147c7e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-01-18 22:12:07 -08:00
David Harris
17c9be7695 Cleanup typos, remove Zicond from riscof until it is working 2024-01-18 21:36:52 -08:00
Jordan Carlin
82d9467eea Add coverage of FIOM in different privelege modes 2024-01-18 19:29:16 -08:00
Jordan Carlin
12b2baff82 add coverage of sfence.inval.ir instruction and fix sret coverage 2024-01-18 17:33:59 -08:00
naichewa
8b60992e72 fixed SPI tests failing when no icache 2024-01-17 14:38:11 -08:00
David Harris
f8c88a398a Coverage improvements 2024-01-15 07:16:41 -08:00
Jordan Carlin
51f670c821
Merge branch 'openhwgroup:main' into main 2024-01-12 19:43:01 -08:00
Jordan Carlin
6c797570fa Add coverage for all Zcb instructions 2024-01-12 19:10:13 -08:00
Rose Thompson
0b2af0c99a Modifed the sv39 tests so they work with just 128MiB physical memory. 2024-01-12 20:00:21 -06:00
Rose Thompson
e6a2595936 Modified sv48 svadu test to work with 128MB rather than 2GB physical memory. 2024-01-12 11:05:06 -06:00
David Harris
9eb6d9c8b8 Added Zicond support 2024-01-11 07:37:15 -08:00
David Harris
ba7e017bd9 Added Zcb c.lbu coverage test 2024-01-10 10:01:46 -08:00
David Harris
d36b6e919a Fixed missing Zba ISA string from spike_rv64gc_isa.yaml for RISCOF 2024-01-09 10:00:06 -08:00
David Harris
caedab679a Rewrote testbench to count signature entries rather than looking for x; this will facilitate Verilator which does not use x 2024-01-07 07:14:12 -08:00
David Harris
0781cd4a44 Improved tlbcontrol to fault on R=0,W=1; fixed more coverage testsin tlbmisc.S; changed integer type to try to speed up CoreMark; comments in Verilate 2024-01-05 22:45:15 -08:00
David Harris
ed623f1a71 Fixed unsupported riscof YAML string; preparing for Verilator -G testcase 2024-01-05 20:06:21 -08:00
David Harris
680a014876 Finished LSU tlbcontrol coverage tests 2024-01-02 10:16:20 -08:00
David Harris
d229dc06ee Coverage improvements; remove incorrect logic checking NAPOT nonleaf PTE 2024-01-02 00:35:17 -08:00
David Harris
52b6d1d163 restored tlbNAPOT coverage tests 2023-12-31 09:55:58 -08:00
David Harris
b025cd8a0d Updated tlbNAPOT to test instructions as well 2023-12-20 23:01:35 -08:00
David Harris
9ced88c55c Fixed tlbNAPOT test to run and makefile to gather coverage stats 2023-12-20 21:45:14 -08:00
David Harris
d130a78616 Updated to current version of toolchain and prepare to be able to compile Zcb and Zicboz when supported 2023-12-20 16:29:03 -08:00
David Harris
0ff049db86 Removed unused tests from wally-riscv-arch-test 2023-12-20 13:34:12 -08:00
David Harris
8552369687 Merged PR538, delete unused tests 2023-12-20 13:30:31 -08:00
Rose Thompson
70d0169019 All regression tests which matter are running! 2023-12-20 14:57:52 -06:00
Rose Thompson
1b59182d59 Updated tests with ending label. 2023-12-20 14:55:37 -06:00
Rose Thompson
49b1b7c7f9 Fixed the last uninitialized memory issue in the priv tests. 2023-12-19 16:51:56 -06:00
Rose Thompson
b04ad23c33 Fixed bugs in the wally64periph signature. 2023-12-19 16:16:59 -06:00
Rose Thompson
726efee1e2 Fixed bugs in the cbom test. 2023-12-19 15:53:48 -06:00
Rose Thompson
418ae0decc Fixed some regression tests with David's help. 2023-12-19 14:18:21 -06:00
David Harris
a138ef37b1 Switched to using riscv-arch-test rv32e_m suite. Need to rename it from rv32e_unratified (PR pending) 2023-12-15 19:26:50 -08:00
David Harris
38f4d9baf8 Use riscv-arch-test arch32e instead of outdated wally-riscv-arch-test wally32e 2023-12-15 05:05:53 -08:00
David Harris
29f57958a9 Fixed WALLY-lrsc in ImperasDV by setting reservation set size to native word size and adjusting imperas.ic lr_sc_grain=8 to match 2023-12-14 15:32:36 -08:00
David Harris
166c98b6f6 Fixed issue 526 about WALLY-mmu-sv39-svadu-svnapot-svpbmt not checking ppn for NAPOT pages. Improved test case to check normal and malformed ppn 2023-12-13 19:43:17 -08:00