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  • c21bd8a463 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-23 20:12:27 -0400
  • e3672ca23f Add address translation to busybear testbench Thomas Fleming 2021-04-23 20:12:20 -0400
  • 288a6d82ce Fix HSIZE and HBURST signal widths in PMA checker Thomas Fleming 2021-04-23 20:11:43 -0400
  • 85eb6bcf1a Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main David Harris 2021-04-23 19:04:29 -0400
  • 9415e00bfa Fixed exe2memfile.pl to handle large files David Harris 2021-04-23 19:04:16 -0400
  • 27ef10df07 almost working icache. Ross Thompson 2021-04-23 16:47:23 -0500
  • 09755251bc busybear Noah Boorstin 2021-04-23 17:32:24 -0400
  • 5b41ae6a2e pipeline testing additonal files Shriya Nadgauda 2021-04-23 15:46:02 -0400
  • c66e63ff70 adding pipeline testing Shriya Nadgauda 2021-04-23 14:19:17 -0400
  • c91f1e197b Remind people to run make allclean when a regression fails Jarred Allen 2021-04-22 19:20:51 -0400
  • 020fb65adf Fixed icache for 32 bit. Merge branch 'cache' into main Ross Thompson 2021-04-22 16:45:29 -0500
  • c42399bdb5 Yes. The hack to not repeat the d memory operation fixed this issue. Ross Thompson 2021-04-22 15:22:56 -0500
  • da76b80991 Write PCM to TVAL registers Thomas Fleming 2021-04-22 16:17:57 -0400
  • 8fee3b3872 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-22 15:37:19 -0400
  • 00ce24e67c Prepare to squash bad ahb accesses Thomas Fleming 2021-04-22 15:36:45 -0400
  • 53c05d6a73 Clean up lint errors in fpu and muldiv Thomas Fleming 2021-04-22 15:36:03 -0400
  • 6b4d2e9634 Fix misa synthesis bug (for real now) Domenico Ottolia 2021-04-22 15:35:20 -0400
  • 38236e9172 Implement first pass at the PMA checker Thomas Fleming 2021-04-22 15:34:02 -0400
  • 73d9e7775c Pass lint-wally arguments to verilator Thomas Fleming 2021-04-22 13:39:20 -0400
  • 5df6be3ad5 Add buildroot to regression test Jarred Allen 2021-04-22 13:29:55 -0400
  • 6d1a6694a8 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-22 13:20:12 -0400
  • 6acaa313b5 Temporarily disable rv64 mmu test Thomas Fleming 2021-04-22 13:19:18 -0400
  • 3a9eae4244 small parser fix Noah Boorstin 2021-04-21 22:23:51 -0400
  • 74b35ac57a greatly improved PLIC register interface bbracker 2021-04-22 11:22:01 -0400
  • d8ab7a5de2 Partially working icache. The current issue is a StallF is required to halt the icache from getting an updated PCF. However if the dmemory is the reason for a stall it is possible for the icache stall to hold the d memory request continuously causing d memory to repeatedly read from memory. This keeps StallF high and the icache FSM is never allowed to complete. Ross Thompson 2021-04-22 10:20:36 -0500
  • 00b3e36b30 Refactor tlb_ram to use flop primitives Thomas Fleming 2021-04-22 01:52:43 -0400
  • ef80176e2c Extend stall on leaf page lookups Thomas Fleming 2021-04-22 01:51:38 -0400
  • fb8f244dab Fix misa bug Domenico Ottolia 2021-04-22 00:59:07 -0400
  • e336fbd108 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-21 20:01:08 -0400
  • 4bae666fa1 Implement virtual memory protection Thomas Fleming 2021-04-21 19:58:36 -0400
  • 7b3735fc25 Fixed for the instruction spills. Ross Thompson 2021-04-21 16:47:05 -0500
  • c7a21b05f7 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Teo Ene 2021-04-21 16:06:33 -0500
  • ddc98e7d08 Fixed most relevant remaining synthesis compilation warnings with Ben Teo Ene 2021-04-21 16:06:27 -0500
  • cd7ea29ce6 buildroot: add workaround for weird initial MSTATUS state Noah Boorstin 2021-04-21 16:03:42 -0400
  • 532c8771ba major progress. It's running the icache is imperas tests now. Compressed does not work yet. Ross Thompson 2021-04-21 08:39:54 -0500
  • 44da1488ff Add tests for stval and mtval Domenico Ottolia 2021-04-21 02:31:32 -0400
  • f63f16f486 Add tests for scause, and improve tests for sepc. Also make improvements to privileged test generator run.sh file Domenico Ottolia 2021-04-21 01:12:55 -0400
  • bf86a809eb Add tests for sepc register Domenico Ottolia 2021-04-20 23:50:53 -0400
  • f3093ac612 Why was the linter messed up? There are a number of combo loops which need fixing outside the icache. They may be fixed in main. We get to instruction address 50 now! Ross Thompson 2021-04-20 22:06:12 -0500
  • 99424fb983 Progress on icache. Fixed some issues aligning the PC with instruction. Still broken. Ross Thompson 2021-04-20 21:19:53 -0500
  • 251ece20fe Broken icache. Design is done. Time to debug. Ross Thompson 2021-04-20 19:55:49 -0500
  • 0c307d2db1 Fix synthesis warnings for privileged unit (replace 'initial' settings) Domenico Ottolia 2021-04-20 17:57:56 -0400
  • 14d28902a8 really small parser update Noah Boorstin 2021-04-19 23:17:37 -0400
  • 3f0ead9d4e yay buildroot passes a decent amount of tests now Noah Boorstin 2021-04-19 03:25:15 -0400
  • 850f728cc7 Merge branch 'main' into cache Jarred Allen 2021-04-19 00:05:23 -0400
  • d12eb0f4eb fixed synth bugs in fpu Katherine Parry 2021-04-19 00:39:16 +0000
  • 2af4e2f4ac slowly more buildroot progress Noah Boorstin 2021-04-18 18:18:07 -0400
  • 9bb1233433 neat verilog thing Noah Boorstin 2021-04-18 17:48:51 -0400
  • 0fa32ae5d6 buildroot parser: more updates Noah Boorstin 2021-04-17 17:44:40 -0400
  • 6954e6df4c buildroot: sim is now running! Noah Boorstin 2021-04-17 14:44:32 -0400
  • 4f97e9e761 start to add buildroot testbench Noah Boorstin 2021-04-16 23:27:29 -0400
  • b533d17ed8 busybear testgen updates Noah Boorstin 2021-04-15 15:49:52 -0400
  • aef57cab50 dcache lints Jarred Allen 2021-04-15 21:13:56 -0400
  • 7854d838c7 Enable linting of blocks not yet in the hierarchy Jarred Allen 2021-04-15 21:13:40 -0400
  • 290b3424e5 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main bbracker 2021-04-15 21:09:27 -0400
  • 368c94d4ff working GPIO interrupt demo bbracker 2021-04-15 21:09:15 -0400
  • 9f13ee3f31 Add tests for scause and ucause Domenico Ottolia 2021-04-15 19:41:25 -0400
  • 92bb38fa8c Add support for vectored interrupts Domenico Ottolia 2021-04-15 19:13:42 -0400
  • eb9e1843fc Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Domenico Ottolia 2021-04-15 16:57:27 -0400
  • 531423d7e1 Add 32 bit privileged tests Domenico Ottolia 2021-04-15 16:55:39 -0400
  • 2814579f30 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Teo Ene 2021-04-15 15:29:09 -0500
  • 374a93dae6 Quick fix to ahblite missing default statement done in class :) Teo Ene 2021-04-15 15:29:04 -0500
  • e780694ee0 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-15 16:20:43 -0400
  • 6dd7591ceb Change priority encoder to avoid extra assignment Thomas Fleming 2021-04-15 16:17:35 -0400
  • e3deb49b75 Small update to synth scripts Teo Ene 2021-04-15 14:24:39 -0500
  • aa74b14314 Fix bug in device/rv32p/Makefile.include so that 32-bit privileged tests will run Domenico Ottolia 2021-04-15 14:50:03 -0400
  • ff9f1e5e72 Connect tlb and icache properly Thomas Fleming 2021-04-15 14:48:39 -0400
  • ad86295fcf Temporary change to mmu/priority_encoder.sv Teo Ene 2021-04-15 13:37:12 -0500
  • 636e2de9df integraded the FMA into the FPU Katherine Parry 2021-04-15 18:28:00 +0000
  • 81c02bda55 Merge branch 'main' into cache Jarred Allen 2021-04-15 13:47:19 -0400
  • 87b716170c Merge branch 'bpfixes' into main Ross Thompson 2021-04-15 09:06:21 -0500
  • 0369fc5d1e Cherry Pick merge of Shreya's localhistory predictor changes into main. fixed minor bugs in localHistory Shreya Sanghai 2021-04-01 13:40:08 -0400
  • 6d4042e479 added localHistoryPredictor ShreyaSanghai 2021-04-01 22:22:40 +0530
  • 7e9a0602ea fixed bugs in global history to read latest GHRE Cherry pick Shreya's commits into main branch. Shreya Sanghai 2021-03-31 21:56:14 -0400
  • e69cc0d23a Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main bbracker 2021-04-15 09:06:03 -0400
  • 51cdff3e9b csri lint improvement bbracker 2021-04-15 09:05:53 -0400
  • be07768fbb Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main David Harris 2021-04-14 23:41:23 -0400
  • 8c1ef5f36c Deleted extraneous exe2memfile.pl David Harris 2021-04-14 23:41:15 -0400
  • 3717699ad9 Add a comment to explain a detail Jarred Allen 2021-04-14 23:14:59 -0400
  • 3c49fd08f6 Remove imem from testbenches Thomas Fleming 2021-04-14 20:20:34 -0400
  • 892dfd5a9b More icache bugfixes Jarred Allen 2021-04-14 19:03:33 -0400
  • c1e2e58ebe Merge branch 'main' into cache Jarred Allen 2021-04-14 18:24:32 -0400
  • 8f7ddcfdff rv64 interrupt servicing bbracker 2021-04-14 10:19:42 -0400
  • d66fcbc4ab busybear: use (slightly) less terrible verilog Noah Boorstin 2021-04-14 00:18:44 -0400
  • c75455cc41 busybear testbench updates Noah Boorstin 2021-04-14 00:00:27 -0400
  • 7d2d6823f1 Fix mmu lint errors Thomas Fleming 2021-04-13 19:19:58 -0400
  • e7286caec9 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-13 17:56:56 -0400
  • c7c5b803e3 Updated risdvOVPsimPlus with symlink David Harris 2021-04-13 17:53:16 -0400
  • 7f4e763a41 Update virutal memory tests Thomas Fleming 2021-04-13 17:17:08 -0400
  • 0a9b208729 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-13 17:15:10 -0400
  • ef011496a7 Various bugs fixed in FMA Katherine Parry 2021-04-13 18:27:13 +0000
  • 09c9c49541 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-04-13 13:42:03 -0400
  • 6188f10732 Move InstrPageFault to fetch stage Thomas Fleming 2021-04-13 13:39:22 -0400
  • dc8a165806 Add lru algorithm to TLB Thomas Fleming 2021-04-13 13:37:24 -0400
  • 03bb37a849 Fixed synthesis log error caused by typo in synthesis script Teo Ene 2021-04-13 12:12:36 -0500
  • a426b3f199 Changed default target synth frequency Teo Ene 2021-04-13 11:48:30 -0500
  • 1018a10625 Various code syntax changes to bring HDL to a synthesizable level Teo Ene 2021-04-13 11:27:12 -0500
  • 4ae1df1290 Merge branch 'main' into cache Jarred Allen 2021-04-13 01:10:03 -0400
  • fc8b8ad7aa A few more cache fixes Jarred Allen 2021-04-13 01:06:57 -0400
  • 35f8b4f74f Fixed minor bug in muldiv which corrects the lint error. Ross Thompson 2021-04-09 10:56:31 -0500