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369 Commits

Author SHA1 Message Date
Elizabeth Hedenberg
bccd37d778 fixing coremark branch prediction 2021-03-17 15:15:55 -04:00
Elizabeth Hedenberg
74ebe0bef2 replicating coremark changes into coremark bare 2021-03-17 14:36:34 -04:00
Elizabeth Hedenberg
a3b2ffb2c9 Merge branch '3_3_2021' into main 
Making sure coremark works with spring break changes
 2021-03-17 14:11:37 -04:00
Ross Thompson
7bc95ba073 Fixed issue with sim-wally-batch. Are people still using this script? 2021-03-17 11:17:52 -05:00
Ross Thompson
0e2352a6de Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-17 11:07:57 -05:00
Ross Thompson
31ad619a21 Added possibly working OSU test bench as a precursor to running a bp benchmark. 
Fixed a few bugs with the function radix.
 2021-03-17 11:06:32 -05:00
Domenico Ottolia
150faf8dd8 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-03-16 23:27:09 -04:00
Domenico Ottolia
0b880110c9 Add test runner for privileged 2021-03-16 23:26:59 -04:00
Noah Boorstin
45ed2742cf busybear: add seperate message on bad memory access becasue its confusing 2021-03-16 21:42:26 -04:00
Noah Boorstin
162955de69 busybear: add COUNTERS define 2021-03-16 21:08:47 -04:00
Domenico Ottolia
c9d70a1778 Add privileged testbench 2021-03-16 20:28:38 -04:00
Domenico Ottolia
a40b0c6392 Add privileged tests for mcause 2021-03-16 19:22:36 -04:00
Domenico Ottolia
e44a265b9e Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-03-16 19:12:21 -04:00
Jarred Allen
ed68d8240b Undo accidental change 2021-03-16 18:16:00 -04:00
Jarred Allen
ba7bfa9056 Condense the parallel and non-parallel wally-pipelined-batch.do files into one 2021-03-16 18:15:13 -04:00
Jarred Allen
6e7fc07fcf Change busybear to only check that first 100k instructions load 2021-03-16 17:43:39 -04:00
Shreya Sanghai
d9b1e7d67f added gshare and global history predictor 2021-03-16 17:03:01 -04:00
Domenico Ottolia
4330e6614b Add privileged tests folder 2021-03-16 16:11:20 -04:00
Shreya Sanghai
a79e26f9d8 added global history branch predictor 2021-03-16 16:06:40 -04:00
Shreya Sanghai
23a7c8cd92 made performance counters count branch misprediction 2021-03-16 11:24:17 -04:00
Shreya Sanghai
518618ad38 Merge branch 'counters' into main 
added a configurable number of performance counters
 2021-03-16 11:01:30 -04:00
Noah Boorstin
cd58f8a12d remove regression-wally.sh 2021-03-15 19:03:57 -04:00
Noah Boorstin
6d8bcfe6bf copy Ross's branch predictor preload change into busybear 2021-03-15 18:27:27 -04:00
Ross Thompson
8e51935082 Converted branch predictor preloads to use system verilog rather than modelsim's load command. 2021-03-15 12:39:44 -05:00
Ross Thompson
69aacbad4f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 
The last commit message about rv32ic having issues is now invalid. Looks like the issue was resolved.
 2021-03-15 12:06:18 -05:00
Ross Thompson
d341e2d5cb Fixed the parallel script so the rv64ic passes. 
rv32ic and busybear still have issues.
 2021-03-15 12:04:59 -05:00
bbracker
63bfd79009 slightly smarter dtim HREADY 2021-03-13 06:55:34 -05:00
bbracker
12721837f0 imem rd2 adrbits bugfix 2021-03-13 00:10:41 -05:00
Ross Thompson
1f37d9d2db Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-12 20:18:35 -06:00
Ross Thompson
0edaa625e3 Fixed the issue with the batch mode not working after adding the function radix. 2021-03-12 20:16:03 -06:00
bbracker
0f49108ee6 clint HREADY signal update 2021-03-12 20:23:55 -05:00
Ross Thompson
2b9044b9aa Cleaned up the function radix exractFunctionRadix script. I should change the name as this is no longer a modelsim radix. 2021-03-12 15:29:02 -06:00
Ross Thompson
ccaaa829ce Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-12 14:58:04 -06:00
Ross Thompson
0637874cac Cleanup of the branch predictor flush and stall controls. 2021-03-12 14:57:53 -06:00
David Harris
4465854423 Drafted rv32a tests 2021-03-12 00:06:23 -05:00
David Harris
d4e84c58ed 64-bit AMO debugged 2021-03-11 23:18:33 -05:00
Ross Thompson
b1d1f3995c Improve version of the function radix which does not cause the wave file rendering to slow down. 2021-03-11 17:12:21 -06:00
Noah Boorstin
be0bd317e9 test regression script: add commented out rv32ic tests 2021-03-11 12:57:54 -05:00
Noah Boorstin
641a320894 add rv32ic regression test 2021-03-11 12:40:29 -05:00
Noah Boorstin
2dfb944d15 test regression script: parallalize better 2021-03-11 12:25:20 -05:00
Noah Boorstin
b13365365b test regression script: try adding verilator checking also 2021-03-11 07:32:31 +00:00
Noah Boorstin
8717f3604b try adding delays to test regression script 2021-03-11 06:59:50 +00:00
Noah Boorstin
c5b6ca4cc6 this is just a test for now, try to reimplement regression-wally in bash 2021-03-11 06:45:45 +00:00
Noah Boorstin
f31d7a7f5c busybear: account for CSR moving 2021-03-11 06:45:14 +00:00
Thomas Fleming
e57b6cf18c Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 
Conflicts:
	wally-pipelined/src/ebu/ahblite.sv
 2021-03-11 00:15:58 -05:00
David Harris
fe4d288589 Initial untested implementation of AMO instructions 2021-03-11 00:11:31 -05:00
Ross Thompson
f1f7884e10 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-10 15:37:02 -06:00
Ross Thompson
149c9aa0f2 Added debug option to disable the function radix if not needed. 
Function radix slows the simulation by 70 to 76 s (8.5%) for the rv64i tests.
 2021-03-10 15:17:02 -06:00
Ross Thompson
4d7e926dbb I finally think I got the function radix debugger working across both 32 and 64 bit applications. 2021-03-10 14:43:44 -06:00
Noah Boorstin
2d1f63b590 change flop in ahb controller to use normal flop module 2021-03-10 19:14:02 +00:00
Ross Thompson
7b7cacbaf0 Finally I think I have the function radix mapping across all applications correctly. I still need to clean up the code a bit so it is easier to understand. 2021-03-10 11:00:51 -06:00
David Harris
0baa004bb4 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-09 09:28:32 -05:00
David Harris
bea8ac6d59 WALLY-LRSC atomic test passing 2021-03-09 09:28:25 -05:00
Noah Boorstin
87e2a9b920 busybear: better NOPing out of float instructions 2021-03-08 21:24:19 +00:00
Noah Boorstin
9274d09ae2 busybear: better instrF checking 
So this now checks instrF only when StallD is low. @kaveh I'd love your
opinion on this. I don't know if this is a good idea or not. Ideally we
should probably be checking InstrRawD instead, but I kind of want to stay
checking the instr in the F stage instead of D for now. Idk if this is worth
staying in F, I can't really see any big downsides to checking the instruction in
D except that PCD isn't an external signal, but neither is StallD, so.....
Anyway I'd love others' thoughts on this
 2021-03-08 19:48:12 +00:00
Noah Boorstin
08e3691e59 busybear: make a second .do file with better optimization for command line mode 2021-03-08 19:35:00 +00:00
Noah Boorstin
1fc00d41c2 busybear: load mem files from verilog instead of .do 2021-03-08 19:26:26 +00:00
David Harris
52d4a04eb0 Created atomic test vector and directories 2021-03-08 09:38:55 -05:00
Ross Thompson
a3759f585d Updated the paths to the branch predictor memory preloads for busy bear. 2021-03-05 15:36:00 -06:00
Ross Thompson
d6bc34121f Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-05 15:27:22 -06:00
Ross Thompson
9a93193d6a Oups. I forgot to update other do files with the commands to preload the branch predictor memories. 2021-03-05 15:23:53 -06:00
Thomas Fleming
718bfecf46 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-03-05 16:20:53 -05:00
Noah Boorstin
d3bf36b15f busybear: add branch preditor loading to do file 
(sorry to add more loading to the do instead of less)
 2021-03-05 21:01:41 +00:00
Thomas Fleming
ca2a65770c Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-03-05 15:46:51 -05:00
Noah Boorstin
f0a103687e Merge branch 'main' into busybear 2021-03-05 20:27:19 +00:00
Noah Boorstin
6981907521 fix wally-pipelined-batch.do to match wally-pipelined.do 2021-03-05 20:27:01 +00:00
bbracker
612f7a9ee4 added a delay to sel signals 2021-03-05 15:07:34 -05:00
bbracker
a1223ee13b more merging fixes 2021-03-05 14:36:07 -05:00
bbracker
2cd0f19129 remove deprecated mem signals 2021-03-05 14:27:38 -05:00
bbracker
420c9a11c2 refactored sim file 2021-03-05 14:25:16 -05:00
bbracker
62dd9e3075 first merge of ahb fix 2021-03-05 14:24:22 -05:00
Noah Boorstin
464c1de03d busybear: slight testbench update 2021-03-05 19:00:40 +00:00
Thomas Fleming
97e9baa316 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-03-05 13:35:44 -05:00
Thomas Fleming
85dcbee86b Place tlb parameters into constant header file 2021-03-05 13:35:24 -05:00
Thomas Fleming
e48dc38869 Export SATP_REGW from csrs to MMU modules 2021-03-05 01:22:53 -05:00
Noah Boorstin
0af002eb2f busybear: make CSRs only weird for us 2021-03-05 00:46:32 +00:00
Noah Boorstin
7208b9bcf2 busybear: better implenetation of sim-busybear-batch 2021-03-05 00:39:03 +00:00
Ross Thompson
a982ad7a9a Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-04 17:31:27 -06:00
Ross Thompson
7902c3fdb6 updated the function radix to look at wally signals. 2021-03-04 17:31:12 -06:00
Noah Boorstin
cfcd7d1518 busybear: make imperas tests work again 2021-03-04 22:44:49 +00:00
Katherine Parry
5374dca1b9 fixed various bugs 2021-03-04 22:20:39 +00:00
Katherine Parry
4591b25c86 fixed various bugs 2021-03-04 22:20:28 +00:00
Katherine Parry
6fa2bc8efe fixed various bugs 2021-03-04 22:20:23 +00:00
Katherine Parry
10b179399c fixed various bugs 2021-03-04 22:20:02 +00:00
Katherine Parry
8e3b74c772 fixed various bugs 2021-03-04 22:19:21 +00:00
Katherine Parry
4e6b35c8b2 fixed various bugs 2021-03-04 22:18:47 +00:00
Katherine Parry
3c86d0912a fixed various bugs 2021-03-04 22:18:19 +00:00
Thomas Fleming
38bd683f2d Merge branch 'walker' into main 2021-03-04 15:27:03 -05:00
Noah Boorstin
5c456e2d7f busybear: comment out instraccessfaultf for imem for now 2021-03-04 20:26:41 +00:00
Noah Boorstin
fde94f9057 Merge branch 'main' into busybear 
Conflicts:
	wally-pipelined/src/uncore/imem.sv
 2021-03-04 20:16:03 +00:00
Ross Thompson
619bbd9d83 Merge branch 'bp' into main 
Concerns:
1. I don't think the correct data buses are going to the multiplier.
2. I'm not sure the FlushF signal is correct.
 2021-03-04 13:35:46 -06:00
Ross Thompson
a8cd4f2b2e Fixed forwarding around the 2 bit predictor. 2021-03-04 13:01:41 -06:00
Shreya Sanghai
f95a1eadd9 fixed bugs 2021-03-04 12:59:45 -05:00
Shreya Sanghai
7cd8f1a592 added performance counters 2021-03-04 11:42:52 -05:00
bbracker
7852d866ef JALR testing 2021-03-04 10:37:30 -05:00
Ross Thompson
d0223da2f7 Converted to using the BTB to predict the instruction class. 2021-03-04 09:23:35 -06:00
Teo Ene
27a807db95 Added stop to coremark_bare testbench 2021-03-04 07:47:07 -06:00
Teo Ene
95ce4b7daa Edited assemby of bare-metal coremark to make it run 2021-03-04 07:45:40 -06:00
Teo Ene
2723b21988 Linux CoreMark and baremetal CoreMark split into two separate tests/configs 2021-03-04 07:44:33 -06:00
Teo Ene
80f6d6c944 Linux CoreMark is operational 2021-03-04 05:58:18 -06:00