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Add privileged tests folder
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wally-pipelined/testgen/privileged/testgen-CAUSE.py
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154
wally-pipelined/testgen/privileged/testgen-CAUSE.py
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#!/usr/bin/python3
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##################################
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# testgen-CAUSE.py
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#
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# dottolia@hmc.edu 16 Mar 2021
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#
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# Generate directed and random test vectors for RISC-V Design Validation.
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint
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from random import seed
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from enum import Enum
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from random import getrandbits
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##################################
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# functions
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##################################
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# def computeExpected(a, b, test):
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# if (test == "ADD"):
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# return a + b
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# elif (test == "SUB"):
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# return a - b
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# else:
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# die("bad test name ", test)
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# # exit(1)
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def randRegs():
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reg1 = randint(1,31)
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reg2 = randint(1,31)
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reg3 = randint(1,31)
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if (reg1 == 6 or reg2 == 6 or reg3 == 6 or reg1 == reg2):
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return randRegs()
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else:
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return reg1, reg2, reg3
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def writeVectors(storecmd):
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reg1, reg2, reg3 = randRegs()
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lines = f"""
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li x{reg1}, 0
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"""
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write(lines, storecmd, reg1, 0)
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def write(lines, storecmd, reg, expected):
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global testnum
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lines = f"""
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# Testcase {testnum}
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{lines}
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{storecmd} x{reg}, {str(wordsize*testnum)}(x6)
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#RVTEST_IO_ASSERT_GPR_EQ(x0, 0, {formatstr.format(expected)})
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"""
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f.write(lines)
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if (xlen == 32):
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line = formatrefstr.format(expected)+"\n"
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else:
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line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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r.write(line)
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testnum = testnum+1
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##################################
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# main body
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##################################
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# name: (interrupt?, code)
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tests = {
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'User software interrupt': (1, '0'),
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'Supervisor software interrupt': (1, '1'),
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'Machine software interrupt': (1, '3'),
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'User timer interrupt': (1, '4'),
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'Supervisor timer interrupt': (1, '5'),
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'Machine timer interrupt': (1, '7'),
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'User external interrupt': (1, '8'),
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'Supervisor external interrupt': (1, '9'),
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'Machine external interrupt': (1, '11'),
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'Instruction address misaligned': (0, '0'),
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'Instruction access fault': (0, '1'),
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'Illegal instruction': (0, '2'),
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'Breakpoint': (0, '3'),
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'Load address misaligned': (0, '4'),
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'Load access fault': (0, '5'),
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'Store/AMO address misaligned': (0, '6'),
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'Store/AMO access fault': (0, '7'),
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'Environment call from U-mode': (0, '8'),
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'Environment call from S-mode': (0, '9'),
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'Environment call from M-mode': (0, '11'),
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'Instruction page fault': (0, '12'),
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'Load page fault': (0, '13'),
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'Store/AMO page fault': (0, '15'),
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}
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author = "dottolia@hmc.edu"
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xlens = [32, 64]
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numrand = 60;
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# setup
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seed(0xC395DDEB9173AD42) # make tests reproducible
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# generate files for each test
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for xlen in xlens:
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formatstrlen = str(int(xlen/4))
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formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
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formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
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if (xlen == 32):
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storecmd = "sw"
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wordsize = 4
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else:
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storecmd = "sd"
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wordsize = 8
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imperaspath = "../../../imperas-riscv-tests/riscv-test-suite/privileged/"
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basename = "WALLY-CAUSE-" + str(xlen)
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fname = imperaspath + "src/" + basename + ".S"
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refname = imperaspath + "references/" + basename + ".reference_output"
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testnum = 0
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# print custom header part
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f = open(fname, "w")
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r = open(refname, "w")
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line = "///////////////////////////////////////////\n"
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f.write(line)
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lines="// "+fname+ "\n// " + author + "\n"
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f.write(lines)
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line ="// Created " + str(datetime.now())
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f.write(line)
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# insert generic header
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h = open("../testgen_header.S", "r")
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for line in h:
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f.write(line)
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# print directed and random test vectors
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writeVectors(storecmd)
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# print footer
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h = open("../testgen_footer.S", "r")
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for line in h:
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f.write(line)
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# Finish
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lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
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lines = lines + "\nRV_COMPLIANCE_DATA_END\n"
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f.write(lines)
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f.close()
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r.close()
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