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https://github.com/openhwgroup/cvw
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busybear: better instrF checking
So this now checks instrF only when StallD is low. @kaveh I'd love your opinion on this. I don't know if this is a good idea or not. Ideally we should probably be checking InstrRawD instead, but I kind of want to stay checking the instr in the F stage instead of D for now. Idk if this is worth staying in F, I can't really see any big downsides to checking the instruction in D except that PCD isn't an external signal, but neither is StallD, so..... Anyway I'd love others' thoughts on this
This commit is contained in:
Noah Boorstin
parent
08e3691e59
commit
9274d09ae2
@ -1,37 +1,37 @@
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# wally-pipelined.do
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#
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# Modification by Oklahoma State University & Harvey Mudd College
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# Use with testbench_busybear
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# James Stine, 2008; David Harris 2021
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# Go Cowboys!!!!!!
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#
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# Takes 1:10 to run RV64IC tests using gui
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# Use this wally-pipelined.do file to run this example.
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# Either bring up ModelSim and type the following at the "ModelSim>" prompt:
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# do wally-pipelined.do
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# or, to run from a shell, type the following at the shell prompt:
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# vsim -do wally-pipelined.do -c
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# (omit the "-c" to see the GUI while running from the shell)
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onbreak {resume}
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# create library
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if [file exists work-busybear] {
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vdel -all -lib work-busybear
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}
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vlib work-busybear
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# compile source files
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# suppress spurious warnngs about
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# "Extra checking for conflicts with always_comb done at vopt time"
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# because vsim will run vopt
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# wally-pipelined.do
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#
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# Modification by Oklahoma State University & Harvey Mudd College
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# Use with testbench_busybear
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# James Stine, 2008; David Harris 2021
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# Go Cowboys!!!!!!
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#
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# Takes 1:10 to run RV64IC tests using gui
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# Use this wally-pipelined.do file to run this example.
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# Either bring up ModelSim and type the following at the "ModelSim>" prompt:
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# do wally-pipelined.do
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# or, to run from a shell, type the following at the shell prompt:
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# vsim -do wally-pipelined.do -c
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# (omit the "-c" to see the GUI while running from the shell)
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onbreak {resume}
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# create library
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if [file exists work-busybear] {
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vdel -all -lib work-busybear
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}
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vlib work-busybear
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# compile source files
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# suppress spurious warnngs about
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# "Extra checking for conflicts with always_comb done at vopt time"
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# because vsim will run vopt
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vlog +incdir+../config/busybear ../testbench/*.sv ../src/*/*.sv -suppress 2583
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# start and run simulation
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# remove +acc flag for faster sim during regressions if there is no need to access internal signals
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vopt +acc work.testbench_busybear -o workopt
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# start and run simulation
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# remove +acc flag for faster sim during regressions if there is no need to access internal signals
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vopt +acc work.testbench_busybear -o workopt
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vsim workopt -suppress 8852,12070
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# load the branch predictors with known data. The value of the data is not important for function, but
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@ -42,31 +42,33 @@ switch $argc {
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1 {mem load -infile ../config/$1/BTBPredictor.txt -format bin testbench_busybear/dut/hart/ifu/bpred/TargetPredictor/memory/memory}
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}
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view wave
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-- display input and output signals as hexidecimal values
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# Diplays All Signals recursively
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add wave /testbench_busybear/clk
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add wave /testbench_busybear/reset
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add wave -divider
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view wave
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-- display input and output signals as hexidecimal values
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# Diplays All Signals recursively
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add wave /testbench_busybear/clk
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add wave /testbench_busybear/reset
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add wave -divider
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add wave -hex /testbench_busybear/PCtext
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add wave -hex /testbench_busybear/pcExpected
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add wave -hex /testbench_busybear/dut/hart/ifu/PCF
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add wave -hex /testbench_busybear/dut/hart/ifu/InstrF
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add wave -hex /testbench_busybear/dut/InstrF
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add wave -hex /testbench_busybear/dut/hart/ifu/PCF
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add wave -hex /testbench_busybear/dut/hart/ifu/InstrF
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add wave -hex /testbench_busybear/dut/hart/ifu/StallD
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add wave -hex /testbench_busybear/dut/hart/ifu/FlushD
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add wave -hex /testbench_busybear/dut/hart/ifu/InstrRawD
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add wave /testbench_busybear/CheckInstrF
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add wave /testbench_busybear/lastCheckInstrF
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add wave /testbench_busybear/speculative
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add wave /testbench_busybear/lastPC2
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add wave -divider
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add wave -divider
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add wave -divider
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add wave -divider
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add wave /testbench_busybear/dut/uncore/HSELBootTim
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add wave /testbench_busybear/dut/uncore/HSELTim
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add wave /testbench_busybear/dut/uncore/HREADTim
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add wave /testbench_busybear/dut/uncore/dtim/HREADTim0
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add wave /testbench_busybear/dut/uncore/HREADYTim
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add wave -divider
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add wave -divider
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add wave /testbench_busybear/dut/uncore/HREADBootTim
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add wave /testbench_busybear/dut/uncore/bootdtim/HREADTim0
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add wave /testbench_busybear/dut/uncore/HREADYBootTim
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@ -80,8 +82,8 @@ add wave /testbench_busybear/dut/uncore/HRDATA
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#add wave -hex /testbench_busybear/dut/hart/priv/csr/MIE_REG
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#add wave -hex /testbench_busybear/dut/hart/priv/csr/MIDELEG_REG
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#add wave -hex /testbench_busybear/dut/hart/priv/csr/MEDELEG_REG
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add wave -divider
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# registers!
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add wave -divider
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# registers!
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add wave -hex /testbench_busybear/regExpected
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add wave -hex /testbench_busybear/regNumExpected
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add wave -hex /testbench_busybear/HWRITE
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@ -121,49 +123,49 @@ add wave -hex /testbench_busybear/dut/hart/ieu/dp/regf/rf[28]
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add wave -hex /testbench_busybear/dut/hart/ieu/dp/regf/rf[29]
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add wave -hex /testbench_busybear/dut/hart/ieu/dp/regf/rf[30]
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add wave -hex /testbench_busybear/dut/hart/ieu/dp/regf/rf[31]
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add wave /testbench_busybear/InstrFName
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add wave -hex /testbench_busybear/dut/hart/ifu/PCD
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#add wave -hex /testbench_busybear/dut/hart/ifu/InstrD
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add wave /testbench_busybear/InstrDName
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#add wave -divider
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add wave -hex /testbench_busybear/dut/hart/ifu/PCE
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##add wave -hex /testbench_busybear/dut/hart/ifu/InstrE
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add wave /testbench_busybear/InstrEName
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/SrcAE
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/SrcBE
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add wave -hex /testbench_busybear/dut/hart/ieu/dp/ALUResultE
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#add wave /testbench_busybear/dut/hart/ieu/dp/PCSrcE
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#add wave -divider
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add wave -hex /testbench_busybear/dut/hart/ifu/PCM
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##add wave -hex /testbench_busybear/dut/hart/ifu/InstrM
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add wave /testbench_busybear/InstrMName
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#add wave /testbench_busybear/dut/hart/dmem/dtim/memwrite
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#add wave -hex /testbench_busybear/dut/hart/dmem/AdrM
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#add wave -hex /testbench_busybear/dut/hart/dmem/WriteDataM
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#add wave -divider
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add wave -hex /testbench_busybear/dut/hart/ifu/PCW
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##add wave -hex /testbench_busybear/dut/hart/ifu/InstrW
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add wave /testbench_busybear/InstrWName
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#add wave /testbench_busybear/dut/hart/ieu/dp/RegWriteW
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/ResultW
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/RdW
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#add wave -divider
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##add ww
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add wave -hex -r /testbench_busybear/*
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#
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#-- Set Wave Output Items
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#TreeUpdate [SetDefaultTree]
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#WaveRestoreZoom {0 ps} {100 ps}
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#configure wave -namecolwidth 250
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#configure wave -valuecolwidth 120
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#configure wave -justifyvalue left
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#configure wave -signalnamewidth 0
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#configure wave -snapdistance 10
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#configure wave -datasetprefix 0
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#configure wave -rowmargin 4
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#configure wave -childrowmargin 2
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#set DefaultRadix hexadecimal
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#
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#-- Run the Simulation
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run -all
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##quit
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add wave /testbench_busybear/InstrFName
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add wave -hex /testbench_busybear/dut/hart/ifu/PCD
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#add wave -hex /testbench_busybear/dut/hart/ifu/InstrD
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add wave /testbench_busybear/InstrDName
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#add wave -divider
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add wave -hex /testbench_busybear/dut/hart/ifu/PCE
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##add wave -hex /testbench_busybear/dut/hart/ifu/InstrE
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add wave /testbench_busybear/InstrEName
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/SrcAE
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/SrcBE
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add wave -hex /testbench_busybear/dut/hart/ieu/dp/ALUResultE
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#add wave /testbench_busybear/dut/hart/ieu/dp/PCSrcE
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#add wave -divider
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add wave -hex /testbench_busybear/dut/hart/ifu/PCM
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##add wave -hex /testbench_busybear/dut/hart/ifu/InstrM
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add wave /testbench_busybear/InstrMName
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#add wave /testbench_busybear/dut/hart/dmem/dtim/memwrite
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#add wave -hex /testbench_busybear/dut/hart/dmem/AdrM
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#add wave -hex /testbench_busybear/dut/hart/dmem/WriteDataM
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#add wave -divider
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add wave -hex /testbench_busybear/dut/hart/ifu/PCW
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##add wave -hex /testbench_busybear/dut/hart/ifu/InstrW
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add wave /testbench_busybear/InstrWName
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#add wave /testbench_busybear/dut/hart/ieu/dp/RegWriteW
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/ResultW
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#add wave -hex /testbench_busybear/dut/hart/ieu/dp/RdW
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#add wave -divider
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##add ww
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add wave -hex -r /testbench_busybear/*
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#
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#-- Set Wave Output Items
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#TreeUpdate [SetDefaultTree]
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#WaveRestoreZoom {0 ps} {100 ps}
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#configure wave -namecolwidth 250
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#configure wave -valuecolwidth 120
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#configure wave -justifyvalue left
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#configure wave -signalnamewidth 0
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#configure wave -snapdistance 10
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#configure wave -datasetprefix 0
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#configure wave -rowmargin 4
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#configure wave -childrowmargin 2
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#set DefaultRadix hexadecimal
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#
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#-- Run the Simulation
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run -all
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##quit
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@ -162,10 +162,10 @@ module testbench_busybear();
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$display("%0t ps, instr %0d: rf[%0d] does not equal rf expected: %x, %x", $time, instrs, i, dut.hart.ieu.dp.regf.rf[i], regExpected);
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`ERROR
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end
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if (dut.hart.ieu.dp.regf.rf[i] !== regExpected) begin
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force dut.hart.ieu.dp.regf.rf[i] = regExpected;
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release dut.hart.ieu.dp.regf.rf[i];
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end
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//if (dut.hart.ieu.dp.regf.rf[i] !== regExpected) begin
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// force dut.hart.ieu.dp.regf.rf[i] = regExpected;
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// release dut.hart.ieu.dp.regf.rf[i];
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//end
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end
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end
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end
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@ -348,7 +348,7 @@ module testbench_busybear();
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always @(dut.PCF or dut.hart.ifu.InstrF or reset) begin
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if(~HWRITE) begin
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#3;
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if (~reset && dut.hart.ifu.InstrF[15:0] !== {16{1'bx}}) begin
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if (~reset && dut.hart.ifu.InstrF[15:0] !== {16{1'bx}} && ~dut.hart.StallD) begin
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if (dut.PCF !== lastPCF) begin
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lastCheckInstrF = CheckInstrF;
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lastPC <= dut.PCF;
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