David Harris
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8ba0336c6f
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Removed unused addins, cleaned up configuration to support half precision on RV64gc, gate unused hazard inputs to reduce critical path in rv32e
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2023-11-14 11:01:58 -08:00 |
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David Harris
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bcb86b210b
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-13 11:25:46 -08:00 |
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David Harris
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18dddb85b5
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Merge pull request #470 from stineje/main
Remove ppa_ prefix and modify ppaAnalyze.py to handle correct vector
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2023-11-13 11:25:38 -08:00 |
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James E. Stine
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74056246d4
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Remove ppa_ prefix and modify ppaAnalyze.py to handle correct vector
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2023-11-13 10:02:10 -06:00 |
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David Harris
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121f685fa2
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Removed assign statement inside always block
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2023-11-13 07:23:15 -08:00 |
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David Harris
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0f4f89edfe
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-13 05:34:14 -08:00 |
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David Harris
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62ab604113
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Merge pull request #469 from stineje/main
update ppaAnalyze to analyze correctionly freqSweep
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2023-11-13 05:33:37 -08:00 |
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James E. Stine
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46bfdf5df9
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update ppaAnalyze to analyze correctionly freqSweep
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2023-11-13 02:39:25 -06:00 |
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David Harris
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6363804ba4
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-12 20:24:25 -08:00 |
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David Harris
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c44ae93e22
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DivStickyM no longer mysteriously needs to be gated with SqrtM after divder improvemenst
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2023-11-12 20:23:27 -08:00 |
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David Harris
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065f3f3f6d
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DivStickyM no longer mysteriously needs to be gated with SqrtM after divder improvemenst
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2023-11-12 20:23:14 -08:00 |
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Rose Thompson
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8235f66af8
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Merge pull request #468 from davidharrishmc/dev
Divider optimization
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2023-11-12 20:05:44 -08:00 |
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David Harris
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571c7d3be4
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Divider cleanup
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2023-11-12 19:41:12 -08:00 |
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David Harris
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f437336540
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Explained sqrt preshifting
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2023-11-12 10:05:54 -08:00 |
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David Harris
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7c50b2c571
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Renamed qsel to uslc and simplified radix2 uslc
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2023-11-12 06:36:57 -08:00 |
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David Harris
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002034845a
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fdivsqrt comment improvements
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2023-11-12 06:15:47 -08:00 |
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Rose Thompson
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4c2a9c7bab
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Merge pull request #467 from davidharrishmc/main
Sanity in FDIVSQRT bit counts
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2023-11-11 16:37:25 -08:00 |
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David Harris
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6ac83c776e
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Cleaned up number of bits in fdivsqrt
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2023-11-11 15:50:06 -08:00 |
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David Harris
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2bf5143163
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Bug fixes related to size of fpdivsqrt bit count and number of cycles
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2023-11-11 05:58:53 -08:00 |
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David Harris
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448ced00c5
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Fixed testbench-fp to reflect signal name changes
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2023-11-11 04:05:34 -08:00 |
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Rose Thompson
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0d6fb879aa
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Merge pull request #466 from stineje/main
Add pap runs for sweep
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2023-11-10 22:25:55 -08:00 |
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Rose Thompson
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3af8e1ff50
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Merge pull request #465 from davidharrishmc/dev
fdivsqrt cleanup
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2023-11-10 22:25:09 -08:00 |
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James E. Stine
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7b79d8edeb
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Update scripts/synth.tcl to add with parameter for width and also checks wrapper to see if running CONFIG=rv32e to run without WIDTH
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2023-11-10 21:10:35 -06:00 |
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James E. Stine
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65e536e401
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Update ppa/ppaSynth.py for sky130 and better sweep parameterization
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2023-11-10 21:07:36 -06:00 |
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James E. Stine
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e1c935bd9b
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Add bestSynths.csv that are the initial values. If this is re-run after ppaAnalysis.py is run, more refinement can be made
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2023-11-10 21:06:24 -06:00 |
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James E. Stine
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91d7790251
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update README for ppaSynth.py
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2023-11-10 21:05:42 -06:00 |
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David Harris
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d5ba8fc5e6
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fdivsqrt parameter cleanup
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2023-11-10 18:33:08 -08:00 |
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David Harris
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3cae2385ab
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Simplified out LOGRK parameter
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2023-11-10 18:19:41 -08:00 |
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David Harris
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7d0d9dcebe
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divider cleanup
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2023-11-10 18:01:13 -08:00 |
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David Harris
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03864642a7
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fdivsqrt cleanup
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2023-11-10 16:42:32 -08:00 |
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David Harris
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c5b12b7331
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-10 16:40:54 -08:00 |
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David Harris
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3108b58290
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Simplified integer postnormalization shift
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2023-11-10 14:55:36 -08:00 |
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David Harris
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b315ead575
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Simplified IntDivNormShift
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2023-11-10 14:28:57 -08:00 |
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David Harris
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2903791820
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Simplified cycle count logic
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2023-11-10 14:00:27 -08:00 |
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David Harris
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8f87860146
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Reduced duplicated logic in fdivsqrtcycles
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2023-11-10 11:25:54 -08:00 |
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David Harris
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255873a50c
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Divsqrt cleanup: change Q to U, commenting code
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2023-11-10 11:21:02 -08:00 |
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David Harris
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953c53d065
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fdivsqrt parameter cleanup
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2023-11-10 09:11:15 -08:00 |
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Rose Thompson
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e1a7c7986a
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Merge pull request #463 from davidharrishmc/dev
Dev
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2023-11-10 08:48:07 -08:00 |
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David Harris
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4c106215f4
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Started cleaning up shifting leading 1 in fdivsqrt
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2023-11-10 08:46:55 -08:00 |
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David Harris
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426aabbc1a
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Imperas commenting
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2023-11-10 08:26:32 -08:00 |
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David Harris
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7e00581187
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Add Svadu support and SPI to imperas configuration
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2023-11-10 06:27:25 -08:00 |
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David Harris
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d7ced56c60
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Merge pull request #460 from naichewa/main
removed vestigial logic, added comments, deleted unused signals
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2023-11-10 05:18:57 -08:00 |
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naichewa
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5ce16dcb63
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Cleanup
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2023-11-09 16:52:55 -08:00 |
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naichewa
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3052a68d84
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Remove old 2/4 bit logic, add comments,
clean up unused signals
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2023-11-09 16:48:11 -08:00 |
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David Harris
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bae3772548
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-11-09 10:33:25 -08:00 |
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Rose Thompson
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1d2eccc14d
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Merge pull request #458 from stineje/main
fix to setup.csh and also ppaSynth.py
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2023-11-09 10:20:05 -08:00 |
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David Harris
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625652b9ca
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Reporting stall path in synthesis script, support Zcb in Imperas
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2023-11-09 06:59:29 -08:00 |
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James E. Stine
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9a47667fd7
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update README on ppa
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2023-11-09 01:00:33 -06:00 |
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James E. Stine
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5a115bc6f2
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update ppaSynth.py with runCommand
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2023-11-09 00:52:40 -06:00 |
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James E. Stine
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a6bc69d73f
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Add encoding for utf-8 on wrapperGen.py to avoid issue with incorrect encoding on RHEL C-shell
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2023-11-08 23:57:59 -06:00 |
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