828 Commits

Author	SHA1	Message	Date
Ross Thompson	85ba53eeaf	Merge pull request #406 from magpyed/cachesim_fix ... Properly gate LRUWriteEn with ~FlushStage	2023-09-05 11:10:58 -05:00
David Harris	9747d122d2	tlbNAPOT hangs due to PBMT making instruction memory uncacheable, and spill logic not working there. Fixed TLBLRU to update recently used on TLBHit rather than CAMHit. Moved coverage exclusions to proper line in pmachecker	2023-09-02 12:56:36 -07:00
Limnanthes Serafini	6c78942685	Properly gate LRUWriteEn with ~FlushStage	2023-09-01 23:31:02 -07:00
David Harris	e75ceb044f	Improved tlb and controller coverage; fixed exclusions on broken lines	2023-08-31 00:27:47 -07:00
Kevin Kim	e4b0ab1472	Merge branch 'openhwgroup:main' into synth_wrapper_gen	2023-08-28 09:03:10 -07:00
Kevin Kim	ea46280146	make synth integerates wrapper generation and runs synth on wrapper	2023-08-28 09:02:56 -07:00
Ross Thompson	d892afc574	Merge pull request #398 from davidharrishmc/dev ... Completed basic tests of svnapot and svpbmt	2023-08-28 09:10:20 -05:00
David Harris	8d3ff59673	Completed basic tests of svnapot and svpbmt	2023-08-28 06:57:35 -07:00
Kevin Kim	dabd15e029	synth works	2023-08-26 21:11:21 -07:00
David Harris	7a092a2275	Fixed merge conflict for ZICBOP	2023-08-25 18:41:57 -07:00
David Harris	f7b50f4721	Preparing to merge with CBO* changes	2023-08-25 18:41:03 -07:00
David Harris	bd6eef2a51	Initial implementation of SVNAPOT and SVPBMT does not break regression	2023-08-25 18:33:08 -07:00
David Harris	c6631ef808	Added N and PBMT bits to MMU PTE	2023-08-24 19:44:46 -07:00
David Harris	0e16203cd8	Merge pull request #393 from ross144/main ... Implemented and tested CBOZ instruction	2023-08-24 19:17:38 -07:00
David Harris	c45fbe1ffe	Merge pull request #394 from harshinisrinath1001/main ... Improved testing of csri with priv.S!	2023-08-24 19:16:50 -07:00
harshinisrinath	c9112ff18d	Improved testing of csri with priv.S	2023-08-24 18:39:15 -07:00
Ross Thompson	99455ad851	Fixed minor performance bug with CBOZ.	2023-08-24 17:08:20 -05:00
Ross Thompson	914b6f9734	Now have CBOZ instructions working!	2023-08-24 16:47:35 -05:00
David Harris	f5dab9f2fe	Check for legal SATP mode values	2023-08-24 05:18:04 -07:00
Ross Thompson	00e65c4ae7	Oups there was a bug in the SATP fix. RV32GC was broken by the changes.	2023-08-23 09:42:46 -05:00
Ross Thompson	45a7dfba28	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-08-23 09:15:13 -05:00
Jacob Pease	140d246fb5	Prevented writes to SATP enabling SV57. This follows the spec more accurately. Linux can now successfully probe SATP.	2023-08-22 16:25:56 -05:00
Ross Thompson	c2a9fbb1fc	Fixed bug with the cbo.inval clearing already cleared lines.	2023-08-21 17:51:51 -05:00
Ross Thompson	05d590b0b9	Fixed issue when with flush miss.	2023-08-18 16:36:13 -05:00
Ross Thompson	fc3fccafe9	Now we have invalidate, clean, and flush working.	2023-08-18 16:32:22 -05:00
Ross Thompson	4eeba9bed9	Added cbom test to custom. Needs to be moved to wally-riscv-arch-tests.	2023-08-18 15:59:39 -05:00
Ross Thompson	5c408454b8	Might have working cbo clean and flush instructions.	2023-08-18 14:48:21 -05:00
Ross Thompson	21129dde71	Fixed cbo instruction decode.	2023-08-18 11:32:30 -05:00
Ross Thompson	9dcc70d6c1	Updated the hazard logic for CMO operations.	2023-08-17 17:58:49 -05:00
Ross Thompson	072126b967	Found first bug in CMO implementation.	2023-08-17 16:57:54 -05:00
Ross Thompson	f9df1fda23	CMOZ now implemented in the D cache.	2023-08-17 12:46:40 -05:00
Ross Thompson	624b3e3ab2	Added clean and flush to cache fsm.	2023-08-16 14:23:56 -05:00
Ross Thompson	5281077531	More progress towards cmo.	2023-08-15 18:17:15 -05:00
Ross Thompson	9f37fef145	The L1 D cache now supports cache line (block) invalidation and partial support for clean and flush.	2023-08-14 16:39:18 -05:00
Ross Thompson	0eac74ac7b	Initial CMO implementation. Just adds control signals into the L1 caches.	2023-08-14 15:43:12 -05:00
Ross Thompson	7a196d3fa7	Cache cleanup.	2023-07-31 14:12:53 -05:00
Ross Thompson	faaf43fa10	Merge pull request #372 from davidharrishmc/dev ... PLIC part select warnings fixed	2023-07-31 11:28:28 -04:00
David Harris	6ff2b0cc2c	Merge pull request #373 from harshinisrinath1001/main ... Improved testing of pmd in priv, fixed bugs, and attempted to reset menvcfg and fixed spacing in fpu/fma and fpu/postprocessing	2023-07-30 22:46:44 -07:00
Harshini Srinath	7ed4cf97ed	Fixed formatting	2023-07-30 18:36:25 -07:00
Harshini Srinath	603ed2160e	Fixed formatting	2023-07-30 18:30:23 -07:00
Harshini Srinath	acbbe7941a	Fixed formatting	2023-07-30 18:27:22 -07:00
Harshini Srinath	e4de9ae87c	Fixed formatting	2023-07-30 18:18:24 -07:00
Harshini Srinath	4c1a07eb9c	Fixed formatting	2023-07-30 18:06:25 -07:00
Harshini Srinath	1badc8a8c5	Fixed formatting	2023-07-30 18:00:39 -07:00
Harshini Srinath	41555b149e	Fixed formatting	2023-07-30 17:54:47 -07:00
Harshini Srinath	8e97224cd7	Fixed formatting	2023-07-30 17:46:23 -07:00
Harshini Srinath	469b03577d	Fixed formatting	2023-07-30 17:39:37 -07:00
Harshini Srinath	141384f60f	Fixed formatting	2023-07-30 17:38:22 -07:00
Harshini Srinath	bbbd5f6b2d	Fixed spacing	2023-07-30 17:32:46 -07:00
Harshini Srinath	d7b2d84124	Fixed spacing	2023-07-30 17:22:40 -07:00