cvw/src
2023-08-15 18:17:15 -05:00
..
cache More progress towards cmo. 2023-08-15 18:17:15 -05:00
ebu Improved the critical path even more. The Arty A7 works upto 19Mhz easily. Testing out 22Mhz now. 2023-07-21 16:31:26 -05:00
fpu Merge pull request #372 from davidharrishmc/dev 2023-07-31 11:28:28 -04:00
generic Merge branch 'boot' into mergeBoot 2023-07-21 17:43:45 -05:00
hazard MDU and hazard unit now also parameterized. Based on Lim's work. Again I want to clarify this their work. Not mine. I'm just doing this because the merge had an issue. 2023-05-24 15:01:35 -05:00
ieu Fixed the privilege decoder bug which prevented the fpga linux boot. 2023-07-10 17:00:06 -05:00
ifu Initial CMO implementation. Just adds control signals into the L1 caches. 2023-08-14 15:43:12 -05:00
lsu Initial CMO implementation. Just adds control signals into the L1 caches. 2023-08-14 15:43:12 -05:00
mdu Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 15:38:38 -05:00
mmu Removed all old references to the old flash card controller. 2023-07-24 15:45:57 -05:00
privileged Fixed a very subtle combinational loop bug the SSTC implementation of csrs.sv. STIMCMPH did not assign all XLEN bits of CSRSReadValM so dc_shell produced d-latches and vivado created a combinational loop. 2023-07-28 11:20:29 -05:00
uncore Cleaned up lint for plic_apb part select 2023-07-30 02:00:38 -07:00
wally Merge branch 'boot' into mergeBoot 2023-07-21 17:43:45 -05:00
cvw.sv Removed all old references to the old flash card controller. 2023-07-24 15:45:57 -05:00