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Fixed bug with the cbo.inval clearing already cleared lines.
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src/cache/cachefsm.sv
vendored
2
src/cache/cachefsm.sv
vendored
@ -156,7 +156,7 @@ module cachefsm import cvw::*; #(parameter cvw_t P,
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// write enables internal to cache
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assign SetValid = CurrState == STATE_WRITE_LINE |
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(CurrState == STATE_READY & CMOp[3]); // *** RT: NOT completely right has to be a hit
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assign ClearValid = P.ZICBOM_SUPPORTED & ((CurrState == STATE_READY & CMOp[0]) |
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assign ClearValid = P.ZICBOM_SUPPORTED & ((CurrState == STATE_READY & CMOp[0] & CacheHit) |
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(CurrState == STATE_CMO_WRITEBACK & CMOp[2] & CacheBusAck));
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// coverage off -item e 1 -fecexprrow 8
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assign LRUWriteEn = (CurrState == STATE_READY & AnyHit) |
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