Divya2030
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7a5eac963e
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Revert "pmp functional coverage basic"
This reverts commit db2b07b05d.
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2024-05-02 11:43:33 -07:00 |
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Divya2030
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9f27f3fe28
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Merge branch 'main' of github.com:Divya2030/cvw
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2024-05-02 11:21:05 -07:00 |
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Divya2030
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db2b07b05d
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pmp functional coverage basic
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2024-05-02 11:20:03 -07:00 |
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David Harris
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e667adf946
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Added covergen directed coverage generator
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2024-05-01 14:47:37 -07:00 |
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David Harris
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6415bfc3c2
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Code and testbench cleanup
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2024-04-23 10:17:44 -07:00 |
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David Harris
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f9eec8c43f
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Merged wsim changes
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2024-04-22 13:11:35 -07:00 |
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Kunlin Han
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9be0303493
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Add support for dumping vcd.
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2024-04-22 13:03:51 -07:00 |
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David Harris
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26711083df
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Flushing uart.out file to observe progress
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2024-04-21 20:08:35 -07:00 |
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David Harris
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03f49dea3f
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regression printing improvements
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2024-04-21 19:45:09 -07:00 |
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David Harris
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be15a11622
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Fixed conflicts on getenv
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2024-04-21 08:38:13 -07:00 |
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David Harris
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00a1c0fc57
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Fixed WALLY/RISCV paths in testbench/rom1p1r; search log files for warnings and errors
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2024-04-21 00:02:15 -07:00 |
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David Harris
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1817ab2e11
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testbench import is happy now for Questa, but throws lint warning for VCS
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2024-04-20 23:13:13 -07:00 |
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David Harris
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fd6a6b2249
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environment variable cleanup
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2024-04-20 22:52:08 -07:00 |
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David Harris
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a1876b1e7c
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script cleanup
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2024-04-20 17:22:31 -07:00 |
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David Harris
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338f37b570
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Moved getenv/getenvval declaration to config-shared so lint and regression both run
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2024-04-20 17:19:42 -07:00 |
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slmnemo
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f0229e970b
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Fixed getenvvar verilator bug in rom1p1r, Removed unused system function from testbench.
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2024-04-20 17:07:54 -07:00 |
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slmnemo
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66a002d879
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Removed unused rmCmd string declaration
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2024-04-20 16:58:23 -07:00 |
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slmnemo
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354d447269
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Changed testbench to use fopen instead of opening and closing uartfile whenever writing
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2024-04-20 16:56:54 -07:00 |
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Kunlin Han
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29c19d9cb4
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Add system function through DPI to avoid missing support in Verilator.
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2024-04-16 11:23:00 -07:00 |
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Rose Thompson
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1eb1beed95
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Fixed merge conflict bug in the last pull request.
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2024-04-16 10:32:24 -05:00 |
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Rose Thompson
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9fe86712d8
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Merge branch 'main' into wsim_verilator
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2024-04-16 09:07:50 -05:00 |
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David Harris
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160162c98a
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Merge pull request #728 from Karl-Han/verilator_getenv
Add support for getenvval as wrapper for Verilator's getenv
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2024-04-15 17:55:34 -06:00 |
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slmnemo
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39ae26a897
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Added documentation for known Verilator hierarchy bug
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2024-04-15 15:58:09 -07:00 |
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slmnemo
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4b80457f3e
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Fixed issue with Verilator hierarchical referencing by changing module names, moved run-imperas-linux to correct directory
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2024-04-12 21:58:20 -07:00 |
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slmnemo
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342c99d6ea
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Rearranged uart_logger block to only generate if UART is supported
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2024-04-12 21:30:33 -07:00 |
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Kunlin Han
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eeb5c59143
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Remove unnecessary sig and avoid uninitialized signal inside always block.
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2024-04-12 16:06:10 -07:00 |
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Kunlin Han
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4d9de94029
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Add support for getenvval as wrapper for Verilator's getenv.
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2024-04-12 14:59:04 -07:00 |
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Rose Thompson
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bb072fba84
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Fixed the buildroot issue.
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2024-04-06 18:25:53 -05:00 |
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Rose Thompson
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46fdfde7ec
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Removed unnecessary display from testbench.
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2024-04-06 16:10:18 -05:00 |
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David Harris
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e8111da88a
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Removed unused old regression-wally
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2024-04-06 13:47:44 -07:00 |
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David Harris
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6b844a2e6e
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Added GUI support and removed unused wave files
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2024-04-06 13:43:06 -07:00 |
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David Harris
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3c855e3e90
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Passing arguments to buildroot, not yet checking result correctly
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2024-04-06 11:42:41 -07:00 |
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David Harris
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b3f007ec7f
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Working on buildroot in regression
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2024-04-06 11:11:22 -07:00 |
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David Harris
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ac9a21873d
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Pass TEST to testbench with +TEST=<name> rather than -G TEST=<name> so that we don't have to recompile for every new test
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2024-04-06 10:34:21 -07:00 |
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slmnemo
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d107a42e8c
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Replaced rewrite command with system rm command for uart file. Fixed comment on line 573
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2024-04-05 21:39:41 -07:00 |
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slmnemo
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2fcae601a9
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Replaced funky rewrite call with file removal
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2024-04-05 20:59:08 -07:00 |
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slmnemo
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3ee25c8936
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Merged testbench changes
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2024-04-05 17:20:03 -07:00 |
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slmnemo
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5378b61eb2
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Added UART output file buildroot_uart.out for Linux test 'buildroot'.
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2024-04-05 17:18:03 -07:00 |
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Divya2030
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aa6eacbce5
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Merge branch 'openhwgroup:main' into main
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2024-04-03 10:40:30 -07:00 |
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Divya2030
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135f3b6f8f
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vcs testbench
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2024-04-03 10:39:02 -07:00 |
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David Harris
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8755966f50
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Incorporated Kunlin's Verilator hack so testbench runs 110x faster. Isolated within ifdef VERILATOR to make it easier to remove when Verilator issue 4967 is resolved
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2024-04-03 07:23:02 -07:00 |
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David Harris
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8741b01818
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-04-03 06:51:24 -07:00 |
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David Harris
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929eb0430c
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Testbench uses posedge control signals to speed up Verilator
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2024-04-03 06:51:18 -07:00 |
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Rose Thompson
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c11d7ea55e
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Fixed bug in the testbench which did not allow external memory to work correctly.
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2024-04-01 10:59:40 -05:00 |
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David Harris
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0caab3c0c9
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Removed delays from cacheLRU and testbench
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2024-03-25 12:20:25 -07:00 |
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David Harris
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b4a914a6e3
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Commented out fcvt.h.l tests that don't run on fh_arch64gc arch64zfh; added testbench feature to print when the program jumps to address 0, presumably a bad trap handler
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2024-03-14 21:53:30 -07:00 |
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Rose Thompson
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3cf6a19729
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Merge branch 'main' into main
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2024-03-10 10:48:21 -05:00 |
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Rose Thompson
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24dffa39d5
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Yay. David and I got our first Quad load/store instructions working!
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2024-03-07 12:48:52 -06:00 |
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David Harris
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b386331cc8
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Changed '0 to 0 where possible per Chapter 4 style guidelines
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2024-03-06 05:48:17 -08:00 |
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KelvinTr
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01c45ab9d7
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Fixed K extension changes
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2024-02-28 17:05:08 -06:00 |
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