8714 Commits

This Branch

This Branch

All Branches

Author	SHA1	Message	Date
Divya2030	3853f94337	Revert "initial commit pmp basic coverage working" ... This reverts commit 7ca1c976c0.	2024-05-02 11:23:59 -07:00
Divya2030	9f27f3fe28	Merge branch 'main' of github.com:Divya2030/cvw	2024-05-02 11:21:05 -07:00
Divya2030	db2b07b05d	pmp functional coverage basic	2024-05-02 11:20:03 -07:00
Divya2030	694c69c651	Merge branch 'openhwgroup:main' into main	2024-05-02 10:34:15 -07:00
Divya2030	7ca1c976c0	initial commit pmp basic coverage working	2024-05-02 10:33:29 -07:00
Rose Thompson	3f7fbf3c5a	Merge pull request #765 from davidharrishmc/dev ... Added covergen directed coverage generator	2024-05-01 18:59:34 -05:00
David Harris	bae3326212	Merge pull request #766 from slmnemo/linux_nightly ... Updated nightly_build to streamline code, send_emails.	2024-05-01 15:00:10 -07:00
Kaitlin Lucio	e2f35aed55	Merge branch 'openhwgroup:main' into linux_nightly	2024-05-01 14:55:31 -07:00
David Harris	e667adf946	Added covergen directed coverage generator	2024-05-01 14:47:37 -07:00
slmnemo	5667e9a7ed	Updated readme to match new nightly_build	2024-05-01 14:19:13 -07:00
Rose Thompson	07b169688b	Merge pull request #762 from Karl-Han/docker ... Make CVW_MOUNT more usable.	2024-05-01 08:54:50 -05:00
Rose Thompson	b483415a49	Merge pull request #761 from davidharrishmc/dev ... added fcvtmod test, cleanup	2024-05-01 08:53:07 -05:00
slmnemo	8081e00701	Merge branch 'main' of https://github.com/openhwgroup/cvw into linux_nightly	2024-04-30 11:32:24 -07:00
slmnemo	9526be0db0	Changed --send_email option in nightly_build to work on a comma-separated string instead of a hard-coded list. Added archival of repositories until next run is complete.	2024-04-30 11:32:15 -07:00
David Harris	9b18d609ce	Merge pull request #763 from Karl-Han/verilator ... Fix the problem of missing sim/verilator/wkdir	2024-04-30 10:50:01 -07:00
Kunlin Han	cde284d003	Fix the problem of missing sim/verilator/wkdir	2024-04-30 10:48:42 -07:00
Kunlin Han	31a891f811	Make CVW_MOUNT more usable.	2024-04-30 10:44:50 -07:00
David Harris	84b37cacfa	Ignore VCS junk output	2024-04-30 08:59:32 -07:00
David Harris	2da615b34c	Added arch32zfad to regression now that it is running	2024-04-30 08:56:55 -07:00
David Harris	7c8e750abf	Simplified risc-dv run code to one line, removed Spike simulation that seemed to generate infinite log for DH	2024-04-30 08:55:14 -07:00
David Harris	9b22275438	Removed unused signals from WallyTracer	2024-04-30 08:54:28 -07:00
David Harris	fc7c183d56	Added fcvtmod.w.d_b22 to regression now that it works in Sail	2024-04-29 17:52:21 -07:00
Rose Thompson	d196f8f8af	Merge pull request #760 from davidharrishmc/dev ... Synthesis and VCS fixes	2024-04-29 13:16:38 -05:00
David Harris	c0afb44ed4	Tied dangling signals to 0 for some configs to make VCS lint happy	2024-04-28 22:50:36 -07:00
David Harris	7695ad4755	More fround stub code to keep VCS happy	2024-04-28 22:21:51 -07:00
David Harris	8f0c68373e	Verilator fulladder example improvmeents	2024-04-28 22:08:00 -07:00
David Harris	b50bb4cad8	Synthesis reporting updates	2024-04-28 16:52:45 -07:00
Rose Thompson	004ae83c1d	Merge pull request #759 from davidharrishmc/dev ... Fixed synthesis to run with derived configurations	2024-04-28 01:28:33 -05:00
David Harris	055cfcb717	Adjusted site setup based on new QUESTA_HOME	2024-04-27 19:51:23 -07:00
David Harris	45b82cd5c2	Removed no-timing from lint-wally because there are no longer delay statements in the code	2024-04-27 17:12:58 -07:00
David Harris	12c5879467	Synthesis with derived configs	2024-04-27 17:06:44 -07:00
David Harris	438907d069	Merge pull request #758 from slmnemo/linux_nightly ... Fixed up nightly-regression to run with new repo structure.	2024-04-27 15:15:55 -07:00
Kaitlin Lucio	2d869fd601	Added deletion of cvw folder after running back to script.	2024-04-27 13:22:35 -07:00
slmnemo	60aa1868e5	Added full Linux boot without Imperas to nightly_build. Fixed nightly_build to use new regression script. Made Linux build locally for nightly regression. cvw in nightly regression folder is now deleted after testing to conserve space	2024-04-27 08:34:52 -07:00
slmnemo	70ef250184	Removed extraneous buildroot variable from regression	2024-04-27 08:33:34 -07:00
David Harris	2b50b30f23	Updated extractSummary to read synthesis outputs in new form	2024-04-27 07:18:26 -07:00
David Harris	06e34b7be4	Fixed byte enables for synthesis	2024-04-27 06:25:24 -07:00
David Harris	6cb554960c	Updated README about installation	2024-04-26 16:34:31 -07:00
Rose Thompson	585f3b5950	Merge pull request #757 from davidharrishmc/dev ... Functional coverage locations and synthesis fixes	2024-04-26 18:16:59 -05:00
David Harris	1274ec55af	Resolved merge conflict	2024-04-26 16:15:23 -07:00
David Harris	bed31fd112	Merge pull request #756 from quswarabid/fix_regression_flow_riscvdv ... FIXED: Regression flow based on tests generated by RISCV-DV and coverage captured by RISCVISACOV is fixed	2024-04-26 16:13:33 -07:00
David Harris	c7c2e94e26	Fixes for synthesis with derived configurations	2024-04-26 15:58:36 -07:00
Quswar Abid	f999ccadf4	/cad/mentor/questa_sim-2023.4/questasim is fixed, relative paths to design and testbench files are fixed, and RISCV-DV submodule is updated back to the latest commit on master branch	2024-04-26 15:55:39 -07:00
David Harris	4faf44c4c6	Named zknde block in bitmanipalu	2024-04-25 17:24:00 -07:00
David Harris	a249f6f2d7	Merge pull request #755 from ross144/main ... Bug fix: correct record the number of cache misses in the performance counters.	2024-04-24 17:15:13 -07:00
Rose Thompson	6c0b860742	Fixed the cache miss counter.	2024-04-24 16:14:51 -05:00
David Harris	5d97858806	Moved functional coverage files to sim/questa and to tests/riscvdv	2024-04-24 11:46:38 -07:00
Rose Thompson	85eda21dfe	Merge pull request #754 from davidharrishmc/dev ... Integrating riscv-dv	2024-04-24 12:35:39 -05:00
David Harris	160c11d786	Integrating riscv-dv coverage	2024-04-24 10:17:49 -07:00
David Harris	eb7e5d4bc2	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2024-04-24 09:47:56 -07:00