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  • 474b69967a formatted files Kevin Kim 2023-03-06 05:52:08 -0800
  • 288c7ad48c updated license header Kevin Kim 2023-03-06 05:41:53 -0800
  • cec1e89c78 bug fix Kevin Kim 2023-03-05 15:20:48 -0800
  • 19beed7866 extend unit structural mux Kevin Kim 2023-03-05 15:09:02 -0800
  • 7531bf1fd6 zbb result select mux structural Kevin Kim 2023-03-05 14:57:30 -0800
  • 3656d42ac0 zbc input mux structural Kevin Kim 2023-03-05 14:26:31 -0800
  • 869e812aa8 revA signals to cnt, zbb Kevin Kim 2023-03-05 14:26:24 -0800
  • 0e6ea0ee60 ALU changes - added PreShiftAmt signal for shadd - condinvB now muxes from B instead of mask Kevin Kim 2023-03-05 14:06:24 -0800
  • 3d5ee8d964 bug in bctrl - deleted the min/minu decoding for some reason. Kevin Kim 2023-03-04 23:56:33 -0800
  • 6ead150cb1 BSelect from OH encoding to Binary Kevin Kim 2023-03-04 23:19:31 -0800
  • 4b1ee5a196 alu pre-shift -changed ALU pre shift logic to use a 2 bit shifter instead of mux Kevin Kim 2023-03-04 23:07:06 -0800
  • b0f152de28 added python script Kevin Kim 2023-03-04 22:54:32 -0800
  • 499c3c5c30 Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip Kevin Kim 2023-03-04 22:44:09 -0800
  • 6295178073 removed rotate signal in datapath and instead packed into the new BALUControl Signal - BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU Kevin Kim 2023-03-04 22:44:03 -0800
  • 22367e4c20 Working batch mode branch prediction simulations. Ross Thompson 2023-03-04 17:59:16 -0600
  • 5c3f5fe8c6 added in the CSR name for stimecmp(h) Kip Macsai-Goren 2023-03-04 15:53:03 -0800
  • 4fa78a02b7 removed changes to counteren from stimecmp tests Kip Macsai-Goren 2023-03-04 15:46:57 -0800
  • 98ec8d7213 added S time compare to gc configs Kip Macsai-Goren 2023-03-04 15:46:26 -0800
  • 00baa06234 Mostly working bpred launch script. Ross Thompson 2023-03-04 17:20:45 -0600
  • 9c4a69bb0e Partial automation of branch predictor embenching. Ross Thompson 2023-03-04 17:10:58 -0600
  • 0ba1a59a70 added reset values to stime and stimecmp registers Kip Macsai-Goren 2023-02-23 13:45:44 -0800
  • da9627708e Added correct causing and handling of S time interrupts to test suite. Kip Macsai-Goren 2023-03-03 09:46:29 -0800
  • e76e7120c0 Merge remote-tracking branch 'upstream/main' into bit-manip Kip Macsai-Goren 2023-03-04 14:43:12 -0800
  • f13017a927 Updated parsing script. Ross Thompson 2023-03-04 13:45:15 -0600
  • b6dd855395 zbc result mux is now structural Kevin Kim 2023-03-04 09:22:21 -0800
  • 6e52113208 Rotate signal now gets generated in bmu ctrl Kevin Kim 2023-03-03 22:57:49 -0800
  • 18ab538a5e license comments Kevin Kim 2023-03-03 21:52:34 -0800
  • efce306aab removed redundant signals in controller Kevin Kim 2023-03-03 21:52:25 -0800
  • 448e950eba b controller generates comparison signed flag and controller branch signed logic updated accordingly Kevin Kim 2023-03-03 17:12:29 -0800
  • e300c13466 Removed unneeded diagnostic print David Harris 2023-03-03 16:46:16 -0800
  • dea5aae01e
         Merge pull request #126 from davidharrishmc/dev Ross Thompson 2023-03-03 18:01:32 -0600
  • 39c871ee0c Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-03-03 15:54:42 -0800
  • 2c0e9b38ce Setup ImperasDV if available David Harris 2023-03-03 15:54:35 -0800
  • 7599b563a6 Removed debugging code. Ross Thompson 2023-03-03 17:52:00 -0600
  • cab6b9dfc8 Fixed a bunch of odd bugs with the test bench preventing correct measurement of performance counters. Ross Thompson 2023-03-03 17:49:44 -0600
  • 015104f0ed
         Merge pull request #125 from ross144/main David Harris 2023-03-03 13:12:35 -0800
  • daaea6064d Oups included the wave file in the wally-batch.do script. Ross Thompson 2023-03-03 15:10:07 -0600
  • 2d0512936b Fixed batch mode regression test to work with hpmc loggic. Added logic to exclude the embench warmups from preformance counters. Ross Thompson 2023-03-03 14:59:20 -0600
  • 0bb75132c6 sltD signal debug. Passes regression Kevin Kim 2023-03-03 12:44:33 -0800
  • d24f74dc4b sltD logic optimize Kevin Kim 2023-03-03 12:35:40 -0800
  • 1c381b0546 Setup the testbench to exclude the warmup from performance counter reports. Ross Thompson 2023-03-03 13:10:01 -0600
  • 9b4b0c7901 Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip Kip Macsai-Goren 2023-03-03 09:56:51 -0800
  • 46379b6768 Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip Kip Macsai-Goren 2023-03-03 09:56:34 -0800
  • 7270607b22
         Merge pull request #2 from kipmacsaigoren/bctrlmigrate Kevin Kim 2023-03-03 09:56:25 -0800
  • 66b15b9163 Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate Kevin Kim 2023-03-03 09:54:08 -0800
  • 0dee48fa5c
         Merge branch 'openhwgroup:main' into bctrlmigrate Kevin Kim 2023-03-03 09:53:59 -0800
  • 48b10f96e9 Merge remote-tracking branch 'upstream/main' into main Kip Macsai-Goren 2023-03-03 09:48:13 -0800
  • 1e2c81ccca Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip Kip Macsai-Goren 2023-03-03 09:39:52 -0800
  • 5fe8b08253 Merge remote-tracking branch 'upstream/main' into bit-manip Kip Macsai-Goren 2023-03-03 09:36:44 -0800
  • 77c9114bcc removed outdated b-signals in controller Kevin Kim 2023-03-03 08:45:42 -0800
  • f6e97cf516 Added performance new counter prints to testbench. Ross Thompson 2023-03-03 10:42:52 -0600
  • 2b9a6aba91 comments to bctrl Kevin Kim 2023-03-03 08:41:47 -0800
  • 11f165d1bb migrated B-subarith logic into b controller Kevin Kim 2023-03-03 08:40:29 -0800
  • b5a5f364e1 began subarith configurability optimization in controller Kevin Kim 2023-03-03 08:27:11 -0800
  • 17adba5fd5
         Merge pull request #124 from ross144/main David Harris 2023-03-03 06:15:49 -0800
  • baab2cd1f0 Merge branch 'main' of https://github.com/openhwgroup/cvw Ross Thompson 2023-03-03 00:22:27 -0600
  • 7dd8fa16c1 Renamed BTB misprediction to BTA. Ross Thompson 2023-03-03 00:18:34 -0600
  • bdab2c8506 Added divide cycle counter. Ross Thompson 2023-03-02 23:59:52 -0600
  • 4b501f6e03 Added the i and d cache cycle counters. Ross Thompson 2023-03-02 23:54:56 -0600
  • b19d51b6a2 Added fence counter. Ross Thompson 2023-03-02 23:29:20 -0600
  • 3dbfa96aef Added csr write counter, sfence vma counter, interrupt counter, and exception counter. Ross Thompson 2023-03-02 23:21:29 -0600
  • cf4d8e6bd0 Added store stall to performance counters. Ross Thompson 2023-03-02 23:10:54 -0600
  • e257ec96ac Reordered performance counters and added space for new ones. Ross Thompson 2023-03-02 23:04:31 -0600
  • 983e30dcb1 Fixed bug in performance counter script. Ross Thompson 2023-03-02 22:32:13 -0600
  • 9bac643db2 Added support for branch target buffer stats. Ross Thompson 2023-03-02 22:16:30 -0600
  • d51d93a3a8 Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt) David Harris 2023-03-02 20:00:47 -0800
  • f4b8968e12 bug fix, more elegant logic changes in controller Kevin Kim 2023-03-02 16:00:56 -0800
  • 2a0c59d5a7 formatting Kevin Kim 2023-03-02 15:28:43 -0800
  • d0c486df54 removed main instruction decoder dependence on bmu controller Kevin Kim 2023-03-02 15:28:33 -0800
  • 11a977ffe3 added bitmanip illegal instruction signal Kevin Kim 2023-03-02 15:09:55 -0800
  • b52208b539 zbc comments Kevin Kim 2023-03-02 13:52:00 -0800
  • 2d7d143f6d formatted bmu decoder Kevin Kim 2023-03-02 13:45:15 -0800
  • 1b222f91be moved ALUControlD into configurable block Kevin Kim 2023-03-02 12:17:03 -0800
  • 1e1ecaafb1 moved SubArith and RegWriteE into configurable block Kevin Kim 2023-03-02 12:15:57 -0800
  • 7dd4a2e975 added BRegWriteE signal Kevin Kim 2023-03-02 12:15:22 -0800
  • d40f3b2a1c rename shifternew to shifter Kevin Kim 2023-03-02 11:45:32 -0800
  • 905373d53b zbc input select mux optimize Kevin Kim 2023-03-02 11:43:05 -0800
  • 2bfbf051a5 zbc select mux optimization Kevin Kim 2023-03-02 11:40:29 -0800
  • 44d40afca8 fixed controller lint, changed byte unit mux select name and input width Kevin Kim 2023-03-02 11:36:12 -0800
  • 96995c5593 removed redundant zbs Kevin Kim 2023-03-02 11:22:09 -0800
  • 4b6a40857d
         Merge pull request #123 from eroom1966/main Ross Thompson 2023-03-02 09:27:35 -0600
  • 1169567219 fix the memory map privileges in the REF model view eroom1966 2023-03-02 15:25:27 +0000
  • 3d1ffac7d7 Cleaned up branch predictor performance counters. Ross Thompson 2023-03-01 16:40:42 -0600
  • 7d30552325 lab5_2023 setup lab5_2023 David Harris 2023-03-01 13:05:02 -0800
  • c761fb1054 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-03-01 11:18:05 -0800
  • e78591093e Renamed I/D TLBMissOrDAFault to TLBMissOrUpdateDA for consistency with UpdateDA David Harris 2023-03-01 11:18:00 -0800
  • 367f058048
         Merge pull request #121 from ross144/main David Harris 2023-03-01 09:57:59 -0800
  • a61f8bc4cf Set bp to use instruction class prediction by default. Ross Thompson 2023-03-01 11:52:42 -0600
  • e8744684cd Branch predictor cleanup. I think Ch 10 is now done except for BTB performance analysis and the section on running benchmarks and collecting data. Ross Thompson 2023-03-01 11:24:24 -0600
  • 08a1153ae9 More btb cleanup. Ross Thompson 2023-03-01 10:47:00 -0600
  • dd2433f7ff Minor fix to btb. Ross Thompson 2023-03-01 10:45:40 -0600
  • e13ba72c61 Merge branch 'main' of https://github.com/openhwgroup/cvw Ross Thompson 2023-03-01 10:04:13 -0600
  • 64b8b0ea21
         Merge pull request #119 from eroom1966/main Ross Thompson 2023-03-01 09:50:00 -0600
  • 8fe750148e
         Merge pull request #118 from davidharrishmc/dev Ross Thompson 2023-03-01 09:49:19 -0600
  • 72b92e8c0d update testbench for memory privileges also update configuration to define value of mimpid eroom1966 2023-03-01 15:37:11 +0000
  • 2773048bd4 Name cleanup. Ross Thompson 2023-02-28 17:48:58 -0600
  • bd6a1dcf40 Pulled to latest commit of riscv-arch-test David Harris 2023-02-28 15:03:59 -0800
  • 9e52ede0cd Merge remote-tracking branch 'upstream/main' into bit-manip Kip Macsai-Goren 2023-02-28 14:41:51 -0800
  • 2cab4a2f0a Merge remote-tracking branch 'origin' into bit-manip Kip Macsai-Goren 2023-02-28 14:39:57 -0800
  • 87013ccaf0 Found the performance bug with the branch predictor btb power saving update. Ross Thompson 2023-02-28 15:57:34 -0600