forked from Github_Repos/cvw
Updated parsing script.
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@ -39,20 +39,20 @@ def ComputeCPI(benchmark):
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def ComputeBranchDirMissRate(benchmark):
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'Computes and inserts branch direction miss prediction rate.'
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(nameString, opt, dataDict) = benchmark
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branchDirMissRate = 100.0 * int(dataDict['Br Dir Wrong']) / int(dataDict['Br Count'])
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branchDirMissRate = 100.0 * int(dataDict['BP Dir Wrong']) / int(dataDict['Br Count'])
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dataDict['BDMR'] = branchDirMissRate
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def ComputeBranchTargetMissRate(benchmark):
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'Computes and inserts branch target miss prediction rate.'
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# *** this is wrong in the verilog test bench
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(nameString, opt, dataDict) = benchmark
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branchTargetMissRate = 100.0 * int(dataDict['Br Target Wrong']) / (int(dataDict['Br Count']) + int(dataDict['Jump, JR, Jal']) + int(dataDict['ret']))
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branchTargetMissRate = 100.0 * int(dataDict['BP Target Wrong']) / (int(dataDict['Br Count']) + int(dataDict['Jump Not Return']))
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dataDict['BTMR'] = branchTargetMissRate
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def ComputeRASMissRate(benchmark):
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'Computes and inserts return address stack miss prediction rate.'
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(nameString, opt, dataDict) = benchmark
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RASMPR = 100.0 * int(dataDict['RAS Wrong']) / int(dataDict['ret'])
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RASMPR = 100.0 * int(dataDict['RAS Wrong']) / int(dataDict['Return'])
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dataDict['RASMPR'] = RASMPR
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def ComputeInstrClassMissRate(benchmark):
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@ -70,7 +70,9 @@ def ComputeICacheMissRate(benchmark):
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def ComputeICacheMissTime(benchmark):
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'Computes and inserts instruction class miss prediction rate.'
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(nameString, opt, dataDict) = benchmark
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ICacheMR = 100.0 * int(dataDict['I Cache Cycles']) / int(dataDict['I Cache Miss'])
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cycles = int(dataDict['I Cache Miss'])
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if(cycles == 0): ICacheMR = 0
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else: ICacheMR = 100.0 * int(dataDict['I Cache Cycles']) / cycles
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dataDict['ICacheMT'] = ICacheMR
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def ComputeDCacheMissRate(benchmark):
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@ -82,8 +84,10 @@ def ComputeDCacheMissRate(benchmark):
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def ComputeDCacheMissTime(benchmark):
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'Computes and inserts instruction class miss prediction rate.'
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(nameString, opt, dataDict) = benchmark
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ICacheMR = 100.0 * int(dataDict['D Cache Cycles']) / int(dataDict['D Cache Miss'])
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dataDict['DCacheMT'] = ICacheMR
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cycles = int(dataDict['D Cache Miss'])
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if(cycles == 0): DCacheMR = 0
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else: DCacheMR = 100.0 * int(dataDict['D Cache Cycles']) / cycles
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dataDict['DCacheMT'] = DCacheMR
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def ComputeAll(benchmarks):
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for benchmark in benchmarks:
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