Rose Thompson
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cbc44a68ab
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-01-26 12:50:36 -06:00 |
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David Harris
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1c1d3eb956
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HPTW coverage improvements
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2024-01-26 10:46:38 -08:00 |
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Rose Thompson
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c0e04dd622
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-01-26 10:09:44 -06:00 |
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David Harris
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2449e06e55
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Fixed FPU coverage, solved Issue 596 by misaligned AMO throwing access fault when misaligned non-amo are supported
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2024-01-25 21:03:41 -08:00 |
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David Harris
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17f579d4ba
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Reenabled fmadd.h, which is really supported by Zfh
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2024-01-24 07:46:50 -08:00 |
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Rose Thompson
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117ff1828a
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Merge pull request #590 from openhwgroup/revert-589-shiftcorrectiondebug
Revert "more shiftcorrection bug fixes"
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2024-01-23 16:05:30 -06:00 |
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Rose Thompson
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d5bbb5ea27
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2024-01-23 14:37:11 -06:00 |
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David Harris
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4ffa5e7b0a
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Coverage improvements
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2024-01-22 09:49:24 -08:00 |
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David Harris
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171430a695
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FPU and PMP tests
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2024-01-21 14:41:22 -08:00 |
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David Harris
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ff055c404c
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fpu coverage improvements
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2024-01-21 13:17:56 -08:00 |
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David Harris
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9d4a14b209
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coverage improvements
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2024-01-21 11:39:51 -08:00 |
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David Harris
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d801bf5d6c
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Revert "more shiftcorrection bug fixes"
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2024-01-21 10:41:14 -08:00 |
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David Harris
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9e6fa8076f
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-01-21 10:15:38 -08:00 |
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Kevin Kim
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1459943a75
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more shiftcorrection bug fixes
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2024-01-21 10:08:48 -08:00 |
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David Harris
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69218b4b86
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Coverage improvements
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2024-01-21 10:03:07 -08:00 |
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David Harris
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17c9be7695
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Cleanup typos, remove Zicond from riscof until it is working
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2024-01-18 21:36:52 -08:00 |
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David Harris
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911b400af2
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Fault on misaligned AMO
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2024-01-18 13:13:56 -08:00 |
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Rose Thompson
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4c2ba2b0b4
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Added StoreStall back to csrc.
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2024-01-18 14:43:34 -06:00 |
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Rose Thompson
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81d006536a
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Lint passes with 32-bit no D$, but many regressions fail.
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2024-01-18 09:48:44 -06:00 |
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David Harris
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d5e102d520
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2024-01-18 07:38:25 -08:00 |
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Rose Thompson
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ff6bb3be0c
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Fixed another bug with virtual memory and no caches.
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2024-01-18 09:29:52 -06:00 |
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Rose Thompson
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e8474373e4
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Fixed it so Virtual Memory work without a D$.
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2024-01-18 09:18:17 -06:00 |
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David Harris
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74b242ce5c
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Partial implementation of fcvtmod.w.d; flags disagree in one case where Sail might be wrong, and result 134 is wrong because of overflow
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2024-01-17 12:25:06 -08:00 |
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Rose Thompson
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2d3dc55986
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Fixed bug. After I$ invalidated. If the pipelined wasn't stalled the I$ still output the old instruction on the next cycle. Now the I$ ensure that invalidation leads to the next cycle not hitting.
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2024-01-17 12:19:10 -06:00 |
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David Harris
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4cfc86140c
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Zfa fmvh complete and passing tests:
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2024-01-17 06:18:00 -08:00 |
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David Harris
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07e7e02241
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Coded Zfa fmvp but no tests exist
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2024-01-16 21:26:42 -08:00 |
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David Harris
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8654375f26
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Zfa fminm/fmaxm/fltq/fleq implemented and tested
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2024-01-16 20:03:54 -08:00 |
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David Harris
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9d57002c07
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Zfa fli support working for F and D (add fli.sv module)
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2024-01-16 17:27:59 -08:00 |
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David Harris
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0588d611ea
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Zfa fli support working for F and D
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2024-01-16 17:27:40 -08:00 |
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Rose Thompson
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ed0f0d924b
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Merge pull request #577 from davidharrishmc/dev
Zfh fix and typo corrections
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2024-01-16 14:23:23 -06:00 |
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David Harris
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846a0c4d50
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Check fma operations don't support H precision
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2024-01-16 11:12:06 -08:00 |
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David Harris
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1a77c08f6e
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Fixed issues 575 and 477 about FPU tests failing when Zfh = 1.
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2024-01-16 10:46:44 -08:00 |
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David Harris
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dcd40c6be7
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Fixed spelling of output
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2024-01-16 10:27:31 -08:00 |
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David Harris
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abecc98563
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Fixed spelling of precision
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2024-01-16 10:26:00 -08:00 |
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Rose Thompson
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ff5554ca61
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Atomics work correctly without a d cache.
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2024-01-16 10:43:20 -06:00 |
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Rose Thompson
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dfe5ef4427
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Added logic for the non-cache atomics.
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2024-01-15 17:47:17 -06:00 |
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Rose Thompson
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82a786f185
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Hmm. Verilator is complaining about the parameter width. I'm not sure why so I changed to 1 bit.
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2024-01-15 17:36:01 -06:00 |
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Rose Thompson
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614a83331f
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Fixed part of issue #405.
The non-cache version of the bus controller did not have the correct supression of BusCommitted for a read only controller.
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2024-01-15 17:29:00 -06:00 |
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Rose Thompson
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83df3dfe83
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Fixed the zifencei bug (part of issue 405).
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2024-01-15 16:02:37 -06:00 |
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David Harris
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0235970313
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Optimized away unused support for fmv with quads
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2024-01-15 13:40:12 -08:00 |
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David Harris
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da4eca4854
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Tested Zfh support using unreleased version of risch-arch-test Zfh tests. Fixed two bugs in fmv to/from int.
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2024-01-15 13:24:57 -08:00 |
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David Harris
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9e78a7e290
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Incorporated jstine fixes of FPU special case and testbench for conversion
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2024-01-15 07:25:08 -08:00 |
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David Harris
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ed9fa07ba3
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tests/coverage/tlbmisc.S
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2024-01-15 07:16:11 -08:00 |
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David Harris
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fd181169fe
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Corrected spelling of negative
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2024-01-15 07:15:23 -08:00 |
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James E. Stine
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b14cd67bef
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Values for IEEE 754 vs. RISC-V Table 11.4 in the RISC-V Unprivileged ISA
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2024-01-14 22:08:42 -06:00 |
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Jordan Carlin
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51f670c821
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Merge branch 'openhwgroup:main' into main
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2024-01-12 19:43:01 -08:00 |
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Rose Thompson
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dd5f69cb78
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Merge pull request #565 from davidharrishmc/dev
Dev
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2024-01-12 21:30:27 -06:00 |
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Jordan Carlin
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092d10a3cd
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correct c.sext.b encoding and remove unreachable code in 01100 case
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2024-01-12 19:09:10 -08:00 |
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David Harris
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d7b016e8f3
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Cleaned up Zicond implementation
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2024-01-12 18:12:52 -08:00 |
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David Harris
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6226c3db96
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Revert "Fixes for Issue #541"
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2024-01-12 07:50:13 -08:00 |
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