138 Commits

Author	SHA1	Message	Date
Rose Thompson	7041d27a46	Possible bugs in wallyTracer marked.	2024-12-23 11:03:23 -06:00
Huda-10xe	f7eecdc56e	Updating wallyTracer syntax to match wally style	2024-12-22 08:40:16 -08:00
Huda-10xe	ab663e5bc8	Updating WallyTracer for VM signals	2024-12-20 02:14:57 -08:00
Huda-10xe	c1eab9e778	Updates to WallyTracer	2024-12-05 06:55:23 -08:00
Huda-10xe	617434ac32	Changes to Tracer for VM covergae	2024-12-05 00:04:58 -08:00
Rose Thompson	3c848cd16c	Fixed bug in the wally tracer to support hptw pte accesses.	2024-12-03 09:56:03 -06:00
Huda-10xe	54e09df77c	Removing debug signals	2024-12-03 04:10:22 -08:00
Huda-10xe	ffdaca2760	Removing debug signals	2024-12-03 04:09:11 -08:00
Huda-10xe	4591d625d5	Added another signal for VM Coverage	2024-12-03 03:56:30 -08:00
David Harris	ec3143f014	Updated warning in ramxdetector	2024-11-29 12:03:14 -08:00
David Harris	155d1d511b	Fixed funct7 code for sinval.vma (issue #1154)	2024-11-29 11:39:24 -08:00
David Harris	05189d102a	Modifying tracer toward being able to run non-gc configurations in lockstep	2024-11-26 22:09:11 -08:00
David Harris	028ffe9f4a	Removing obsolete ***	2024-11-20 07:23:51 -08:00
Rose Thompson	fcf4ca1417	Disabled tracer print.	2024-11-15 08:32:43 -06:00
Rose Thompson	3596be433c	Fixed the tracer so that traps don't clear the instruction or PC bits.	2024-11-15 08:31:19 -06:00
David Harris	c02a649c3b	Fixed warnings related to tracer variables	2024-11-15 05:33:16 -08:00
Jordan Carlin	9d2a5c6e03	Fix wallyTracer bug	2024-11-14 15:31:10 -08:00
Jordan Carlin	51d7eea98a	Merge branch 'main' of https://github.com/openhwgroup/cvw into rvvi32	2024-11-14 15:04:11 -08:00
Jordan Carlin	61c5d035e9	Add mseccfg shell to wallyTracer and reformat CSRs	2024-11-14 15:03:13 -08:00
Rose Thompson	5e4f4c2072	Simple change to ensure Trapped instructions are included with rvvi as ... valid instructions. Required for functional coverage.	2024-11-14 16:14:02 -06:00
Jordan Carlin	14e9a39523	pmps working for RVVI in RV32	2024-11-13 22:12:11 -08:00
Jordan Carlin	d666a0dd7b	Update formatting in an attempt to understand what's happening in this file	2024-11-13 18:26:53 -08:00
Jordan Carlin	017b3e9872	Fix 32 bit CSRs in wallyTracer	2024-11-13 17:01:01 -08:00
Rose Thompson	77d47e531f	Merge branch 'main' into lrufixes	2024-11-13 10:34:21 -06:00
Rose Thompson	2fe73f8174	Replaced double | and & with single. We were having issues with these verilator giving a warning about the parameter widths not matching. However the warning is not occuring anymore.	2024-11-13 00:02:51 -06:00
Rose Thompson	8993432928	Resolved issue with questa not liking the TEST +arg as a generate.	2024-11-12 23:57:30 -06:00
Rose Thompson	ef7072b7c2	Merge branch 'main' into lrufixes	2024-11-12 17:57:28 -06:00
Rose Thompson	8659d6efdb	Resolved all CacheSim.py vs Wally mismaches.	2024-11-12 17:24:06 -06:00
Rose Thompson	57fbd35484	Fixed lint errors in loggers.sv with Kaitlin.	2024-11-12 15:03:30 -06:00
Rose Thompson	b7b7c79726	CBO.FLUSH was not clearing the valid bit if the cacheline was clean.	2024-11-12 14:16:55 -06:00
Rose Thompson	5cc1fd4a85	Getting closer. Oly the wally64priv tests mismatch between the cachesim and wally.	2024-11-12 12:08:14 -06:00
Rose Thompson	8a4868ac57	Resolved a bug in the cache but there are still mismatches with the cache simulator.	2024-11-12 11:35:29 -06:00
Rose Thompson	0cf7b2e45a	Progress on fixing the cache simulator to support cbo instructions.	2024-11-11 16:37:17 -06:00
Rose Thompson	8fb1673ab3	Updated email address authorship for my files.	2024-10-15 10:27:53 -05:00
Huda-10xe	b77df83b59	Adding DUT signals to the tracer for VM Coverage	2024-10-07 03:52:36 -07:00
Huda-10xe	24f97fa696	Adding DUT signals to the tracer for VM Coverage	2024-10-07 03:49:43 -07:00
Huda-10xe	0817c69152	Adding priv coverage to ISACOV	2024-10-07 03:44:35 -07:00
Rose Thompson	1345a0f315	Merge branch 'main' of https://github.com/openhwgroup/cvw	2024-09-24 10:13:50 -05:00
David Harris	6157023d16	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2024-08-29 15:07:18 -07:00
David Harris	0e9e7d0a49	Fixed wallyTracer floating-point register FLEN	2024-08-29 11:11:19 -07:00
Rose Thompson	6ad2c2e7a6	Merge pull request #935 from davidharrishmc/dev ... Added lockstep support for RV32. Not all wally privileged tests pass…	2024-08-29 10:45:17 -07:00
David Harris	26f3c2a607	Added lockstep support for RV32. Not all wally privileged tests pass yet	2024-08-29 10:44:37 -07:00
Rose Thompson	113d71f1a0	More name updates.	2024-08-21 10:51:24 -07:00
Rose Thompson	f603d21826	Updated my name in multiple locations.	2024-08-21 10:50:39 -07:00
David Harris	010038ec32	Depricate conditional generation based on A_SUPPORTED, which is now computed from ZALRSC_SUPPORTED and ZAAMO_SUPPORTED	2024-08-08 05:27:35 -07:00
David Harris	fa98ae8c30	Depricate conditional generation based on A_SUPPORTED, which is now computed from ZALRSC_SUPPORTED and ZAAMO_SUPPORTED	2024-08-08 05:27:35 -07:00
Rose Thompson	7164841f83	Added padding into the hw rvvi format.	2024-08-06 18:34:46 -05:00
Rose Thompson	ce61429bdf	Fixed the reset bug in wallyTracer.	2024-07-24 13:32:46 -05:00
Rose Thompson	5a6e32576d	Fixed the reset bug in wallyTracer.	2024-07-24 13:32:46 -05:00
Rose Thompson	d0a5b278b7	Factored out the rvvi testbench code into rvvitbwrapper.	2024-07-24 13:10:57 -05:00