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  • bbe0957df5 Merge branch 'gshare' into main Shreya Sanghai 2021-03-18 17:25:48 -0400
  • 1091dd10c1 Switched to gshare from global history. Fixed a few minor bugs. Ross Thompson 2021-03-18 16:05:59 -0500
  • 8f4051543c Fixed minor bug with the size of gshare. Ross Thompson 2021-03-18 16:00:09 -0500
  • eb86bfc084 removed unnecesary PC registers in ifu Shreya Sanghai 2021-03-18 16:31:21 -0400
  • 8d484174a7 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-03-18 14:36:42 -0400
  • 7f7597e667 Connect tlb, pagetablewalker, and memory Thomas Fleming 2021-03-18 14:35:46 -0400
  • 7d4906b1c7 Improve page table creation in python file Thomas Fleming 2021-03-18 14:27:09 -0400
  • bc1a0c6ee7 change ifndef to generate/if Noah Boorstin 2021-03-18 12:50:19 -0400
  • a2b0af460e everyone gets a bootram Noah Boorstin 2021-03-18 12:35:37 -0400
  • ced2a32d21 busybear: update memory map, add GPIO Noah Boorstin 2021-03-18 12:17:35 -0400
  • 57f1ca5259 Switched coremark to RV64IM Teo Ene 2021-03-17 22:39:56 -0500
  • d2fe42d6d0 adapted coremark bare testbench to new dtim RAM HDL Teo Ene 2021-03-17 16:59:02 -0500
  • e69376c823 Merge branch 'main' into cache Jarred Allen 2021-03-17 16:40:52 -0400
  • 4fd0ecff69 Temporarily reverted my last few commits Teo Ene 2021-03-17 15:16:01 -0500
  • 7446a7b479 fix to last commit Teo Ene 2021-03-17 15:07:02 -0500
  • 3e849f99a6 fix to last commit Teo Ene 2021-03-17 15:02:15 -0500
  • d72d774a0b addition to last commit Teo Ene 2021-03-17 14:52:31 -0500
  • dfe6df2e00 Added Ross's addr lab stuff to coremark stuff Teo Ene 2021-03-17 14:50:54 -0500
  • 041439c008 fixing coremark branch prediction Elizabeth Hedenberg 2021-03-17 15:15:55 -0400
  • d0ddb5f461 replicating coremark changes into coremark bare Elizabeth Hedenberg 2021-03-17 14:36:34 -0400
  • da758e9e14 Merge branch '3_3_2021' into main Elizabeth Hedenberg 2021-03-17 14:11:37 -0400
  • f070aae847 Fixed issue with sim-wally-batch. Are people still using this script? Ross Thompson 2021-03-17 11:17:52 -0500
  • 3618a39087 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main Ross Thompson 2021-03-17 11:07:57 -0500
  • 9f8f0242ca Added possibly working OSU test bench as a precursor to running a bp benchmark. Fixed a few bugs with the function radix. Ross Thompson 2021-03-17 11:06:32 -0500
  • 487b198055 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Domenico Ottolia 2021-03-16 23:27:09 -0400
  • 748372dc45 Add test runner for privileged Domenico Ottolia 2021-03-16 23:26:59 -0400
  • bfa7aedd35 busybear: add seperate message on bad memory access becasue its confusing Noah Boorstin 2021-03-16 21:42:26 -0400
  • e7fae21eb8 busybear: add COUNTERS define Noah Boorstin 2021-03-16 21:08:47 -0400
  • d354cbd37d Add privileged testbench Domenico Ottolia 2021-03-16 20:28:38 -0400
  • 82ea97e304 Add privileged tests for mcause Domenico Ottolia 2021-03-16 19:22:36 -0400
  • 1ceb7a7431 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Domenico Ottolia 2021-03-16 19:12:21 -0400
  • 8b0c57a511 Add new make privileged command Domenico Ottolia 2021-03-16 19:11:58 -0400
  • 152ffd16e2 Undo accidental change Jarred Allen 2021-03-16 18:16:00 -0400
  • ae5417195a Condense the parallel and non-parallel wally-pipelined-batch.do files into one Jarred Allen 2021-03-16 18:15:13 -0400
  • f6cbe44cbd Change busybear to only check that first 100k instructions load Jarred Allen 2021-03-16 17:43:39 -0400
  • 36f0631203 added gshare and global history predictor Shreya Sanghai 2021-03-16 17:03:01 -0400
  • a82aa23399 Fix icache for jumping into misaligned instructions Jarred Allen 2021-03-16 16:57:51 -0400
  • b2faf3c888 Add privileged tests folder Domenico Ottolia 2021-03-16 16:11:20 -0400
  • 9eed875886 added global history branch predictor Shreya Sanghai 2021-03-16 16:06:40 -0400
  • 2d2092e8ab Merge remote-tracking branch 'origin/main' into cache Jarred Allen 2021-03-16 14:17:39 -0400
  • 08e9149e20 made performance counters count branch misprediction Shreya Sanghai 2021-03-16 11:24:17 -0400
  • 74f1641c5a Merge branch 'counters' into main added a configurable number of performance counters Shreya Sanghai 2021-03-16 11:01:30 -0400
  • 36452749d7 Merge remote-tracking branch 'origin/main' into cache Jarred Allen 2021-03-15 19:08:25 -0400
  • 9e1612c166 remove regression-wally.sh Noah Boorstin 2021-03-15 19:03:57 -0400
  • 400791163e copy Ross's branch predictor preload change into busybear Noah Boorstin 2021-03-15 18:27:27 -0400
  • 4c8952de6a Converted branch predictor preloads to use system verilog rather than modelsim's load command. Ross Thompson 2021-03-15 12:39:44 -0500
  • f2a6e8c6cf Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main The last commit message about rv32ic having issues is now invalid. Looks like the issue was resolved. Ross Thompson 2021-03-15 12:05:10 -0500
  • 806cfc4ea5 Fixed the parallel script so the rv64ic passes. rv32ic and busybear still have issues. Ross Thompson 2021-03-15 12:04:59 -0500
  • ac9fd5a323 Fix BEQZ tests Jarred Allen 2021-03-14 15:42:27 -0400
  • 926235b180 Merge upstream changes Jarred Allen 2021-03-14 14:57:53 -0400
  • deb13f34bb Get non-jump case working Jarred Allen 2021-03-14 14:46:21 -0400
  • e58d17d5b7 slightly smarter dtim HREADY bbracker 2021-03-13 07:03:33 -0500
  • 345254b5a3 slightly smarter dtim HREADY bbracker 2021-03-13 06:55:34 -0500
  • c5015e5809 imem rd2 adrbits bugfix bbracker 2021-03-13 00:10:41 -0500
  • 940d892f29 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main Ross Thompson 2021-03-12 20:18:35 -0600
  • 7ceef2b0c6 Fixed the issue with the batch mode not working after adding the function radix. Ross Thompson 2021-03-12 20:16:03 -0600
  • f4fb546969 clint HREADY signal update bbracker 2021-03-12 20:23:55 -0500
  • 86078d856f Cleaned up the function radix exractFunctionRadix script. I should change the name as this is no longer a modelsim radix. Ross Thompson 2021-03-12 15:29:02 -0600
  • 6ee97830f7 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main Ross Thompson 2021-03-12 14:58:04 -0600
  • 7743d8edc3 Cleanup of the branch predictor flush and stall controls. Ross Thompson 2021-03-12 14:57:53 -0600
  • 56b690ccb9 Drafted rv32a tests David Harris 2021-03-12 00:06:23 -0500
  • 865c103599 64-bit AMO debugged David Harris 2021-03-11 23:18:33 -0500
  • 318b642359 Improve version of the function radix which does not cause the wave file rendering to slow down. Ross Thompson 2021-03-11 17:12:21 -0600
  • cc94046084 test regression script: add commented out rv32ic tests Noah Boorstin 2021-03-11 12:57:54 -0500
  • 394b79b5de add rv32ic regression test Noah Boorstin 2021-03-11 12:40:29 -0500
  • 54fa16d783 test regression script: parallalize better Noah Boorstin 2021-03-11 12:25:20 -0500
  • aba54659bf test regression script: try adding verilator checking also Noah Boorstin 2021-03-11 07:32:31 +0000
  • 81c14f899d try adding delays to test regression script Noah Boorstin 2021-03-11 06:59:50 +0000
  • 1093b07670 this is just a test for now, try to reimplement regression-wally in bash Noah Boorstin 2021-03-11 06:45:45 +0000
  • a8b242a6ef busybear: account for CSR moving Noah Boorstin 2021-03-11 06:45:14 +0000
  • f47728c6e3 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-03-11 00:47:24 -0500
  • eaef379454 Drafted AMO tests David Harris 2021-03-11 00:42:13 -0500
  • 1294235837 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-03-11 00:15:58 -0500
  • 42275e92ed Initial untested implementation of AMO instructions David Harris 2021-03-11 00:11:31 -0500
  • 4757794887 Return testbench to normal Jarred Allen 2021-03-10 22:58:41 -0500
  • 845115302e Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main Ross Thompson 2021-03-10 15:37:02 -0600
  • f92f766573 Added debug option to disable the function radix if not needed. Function radix slows the simulation by 70 to 76 s (8.5%) for the rv64i tests. Ross Thompson 2021-03-10 15:17:02 -0600
  • dcae90e3ad I finally think I got the function radix debugger working across both 32 and 64 bit applications. Ross Thompson 2021-03-10 14:43:44 -0600
  • 2c25e270a2 change flop in ahb controller to use normal flop module Noah Boorstin 2021-03-10 19:14:02 +0000
  • 50a92247b3 Finally I think I have the function radix mapping across all applications correctly. I still need to clean up the code a bit so it is easier to understand. Ross Thompson 2021-03-10 11:00:51 -0600
  • ae9bcc174d Merge upstream changes Jarred Allen 2021-03-09 21:20:34 -0500
  • 3172be3039 More progress Jarred Allen 2021-03-09 21:16:07 -0500
  • c2f340681d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main David Harris 2021-03-09 09:28:32 -0500
  • 17c0f9629a WALLY-LRSC atomic test passing David Harris 2021-03-09 09:28:25 -0500
  • 4a8b689f62 busybear: better NOPing out of float instructions Noah Boorstin 2021-03-08 21:24:19 +0000
  • c780a25f92 busybear: better instrF checking Noah Boorstin 2021-03-08 19:48:12 +0000
  • 1b206d5a3c busybear: make a second .do file with better optimization for command line mode Noah Boorstin 2021-03-08 19:35:00 +0000
  • 93c9c57426 busybear: load mem files from verilog instead of .do Noah Boorstin 2021-03-08 19:26:26 +0000
  • 9c7da510fb Created atomic test vector and directories David Harris 2021-03-08 09:38:55 -0500
  • d5f151eb0f Updated the paths to the branch predictor memory preloads for busy bear. Ross Thompson 2021-03-05 15:36:00 -0600
  • 87ed6d510c Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main Ross Thompson 2021-03-05 15:27:22 -0600
  • 301166d062 Oups. I forgot to update other do files with the commands to preload the branch predictor memories. Ross Thompson 2021-03-05 14:20:32 -0600
  • 2b891196d9 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-03-05 16:20:53 -0500
  • 3c5be59e9b busybear: add branch preditor loading to do file Noah Boorstin 2021-03-05 21:01:41 +0000
  • be6ee84d87 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main Thomas Fleming 2021-03-05 15:46:51 -0500
  • 86142e764a Merge branch 'main' into busybear Noah Boorstin 2021-03-05 20:27:19 +0000
  • 889d2c0b85 fix wally-pipelined-batch.do to match wally-pipelined.do Noah Boorstin 2021-03-05 20:27:01 +0000
  • 850a2e9329 added a delay to sel signals bbracker 2021-03-05 15:07:34 -0500
  • 77e2e357a7 more merging fixes bbracker 2021-03-05 14:36:07 -0500
  • ed4ff1ecd0 remove deprecated mem signals bbracker 2021-03-05 14:27:38 -0500