Commit Graph

  • b3cf1b45fa
    Merge pull request #210 from SydRiley/main David Harris 2023-04-05 14:56:16 -0700
  • 2a3d9f8c89 Update ram1p1rwe (ce & we) coverage exlusion explanation Alec Vercruysse 2023-04-05 14:54:58 -0700
  • d264d3274c Starting to extend fpu conditional coverage, reformating ifu test cases Sydeny 2023-04-05 14:10:15 -0700
  • 29dec429a0 Merge branch 'main' of https://github.com/openhwgroup/cvw Kevin Thomas 2023-04-05 15:33:10 -0500
  • c4a9bb4269 Formating white space Kevin Thomas 2023-04-05 15:30:55 -0500
  • ab7ea93425 param update David Harris 2023-04-05 13:19:20 -0700
  • 7963bfdbe5
    Merge pull request #205 from kbox13/my-single-change David Harris 2023-04-05 13:16:04 -0700
  • 7345927cb1 Merge branch 'main' of https://github.com/openhwgroup/cvw Kevin Thomas 2023-04-05 15:04:12 -0500
  • af58afd054
    Merge pull request #208 from ross144/main David Harris 2023-04-05 13:03:30 -0700
  • 90c2156164
    Merge pull request #207 from AlecVercruysse/cachesim Ross Thompson 2023-04-05 14:59:52 -0500
  • d1ac175e27 Merge branch 'main' of https://github.com/openhwgroup/cvw Ross Thompson 2023-04-05 14:55:12 -0500
  • 5bae4801bb
    *.out removal Limnanthes Serafini 2023-04-05 12:50:26 -0700
  • 69eecac989
    *.out removal Limnanthes Serafini 2023-04-05 12:50:10 -0700
  • 6f53531e26
    *.out removal Limnanthes Serafini 2023-04-05 12:49:57 -0700
  • 61e19c2ddf Make CacheWay flush and dirty logic dependent on !READ_ONLY_CACHE Alec Vercruysse 2023-04-05 11:46:28 -0700
  • d3a988c96c make Cache Flush Logic dependent on !READ_ONLY_CACHE Alec Vercruysse 2023-04-05 11:45:26 -0700
  • 247af17b6b remove ClearValid from cache Alec Vercruysse 2023-04-05 11:42:57 -0700
  • 3867142f10 change i$ cachetagmem from ram1p1rwbe -> ram1p1rwe Alec Vercruysse 2023-04-05 11:36:02 -0700
  • 4993b1b426 turn off ce coverage for ram1p1rwe Alec Vercruysse 2023-04-05 11:30:39 -0700
  • 277f507e9a add ram1p1rwe for read-only cache ways (remove byte-enable) Alec Vercruysse 2023-04-04 22:21:06 -0700
  • c0206cfcb3 fix typo in cachway setValid input comment Alec Vercruysse 2023-04-04 22:20:31 -0700
  • 270200bc1c put cacheLRU coverage explanation on another line Alec Vercruysse 2023-04-04 22:19:21 -0700
  • c41f4d2e7b Exclude CacheLRU log2 function from coverage Alec Vercruysse 2023-04-03 13:44:07 -0700
  • 7c2512446c Progress on bug 203. Ross Thompson 2023-04-05 13:20:04 -0500
  • c43ee180d3 Add sfence.vma Kevin Box 2023-04-05 09:45:09 -0700
  • 490cebe36b Revert "Add sfence.vma and arch64d/f tests to increase coverage in the LSU" Kevin Box 2023-04-05 10:32:25 -0700
  • 0517c6b2be remove testing changes Kevin Box 2023-04-05 10:27:34 -0700
  • 2c1a0c19dc remove testing change Kevin Box 2023-04-05 10:27:11 -0700
  • 90b5d279fd Add sfence.vma and arch64d/f tests to increase coverage in the LSU Kevin Box 2023-04-05 09:45:09 -0700
  • 7de772dcfe Merge remote-tracking branch 'upstream/main' into cachesim Limnanthes Serafini 2023-04-05 09:53:05 -0700
  • 5e5842893b Minor change with the IFU in the decompress module, in the compressed instruction truth table. The truth table is already fully covered, removed redundant last case checking Kevin Thomas 2023-04-05 10:27:52 -0500
  • 7373cbb3ff
    Merge pull request #201 from ross144/main David Harris 2023-04-05 06:40:14 -0700
  • 98a56dcd66 Further comments and attribution. Limnanthes Serafini 2023-04-05 02:46:31 -0700
  • c42d798ff4 Commenting, attribution for sim, minor log changes Limnanthes Serafini 2023-04-05 02:43:02 -0700
  • 47a8cf3993 Outfiles for the failing tests. Limnanthes Serafini 2023-04-05 02:42:09 -0700
  • 6abd4ee1b7 Changed logging enables, debug mode in sim. Limnanthes Serafini 2023-04-04 23:49:35 -0700
  • 8f3413f0d5 CacheSim edits, tests. I/D$ logging, Lim's version Limnanthes Serafini 2023-04-04 21:12:35 -0700
  • 77bd9824c5 Merge branch 'main' of https://github.com/openhwgroup/cvw into main Noah Limpert 2023-04-04 20:22:00 -0700
  • 243246e49f
    Merge branch 'openhwgroup:main' into cachesim Limnanthes Serafini 2023-04-04 13:15:56 -0700
  • 5b188f239b Fixed the d cache logger. Ross Thompson 2023-04-04 14:19:19 -0500
  • b1a805d1f6 Improved d/i cache logger. Ross Thompson 2023-04-04 13:38:32 -0500
  • 301d13d027 param branch passes lint and sim David Harris 2023-04-04 11:36:27 -0700
  • 23ad9f79f0
    Merge pull request #199 from davidharrishmc/dev Ross Thompson 2023-04-04 11:34:24 -0500
  • b7b1f2443f Fixed WFI to commit when an interrupt occurs David Harris 2023-04-04 09:32:26 -0700
  • 11230f01ae
    Merge pull request #198 from eroom1966/main David Harris 2023-04-04 09:23:38 -0700
  • b9ef99530a add support for Sstc eroom1966 2023-04-04 17:20:00 +0100
  • c21a5aaaf7
    Merge pull request #194 from davidharrishmc/dev Ross Thompson 2023-04-04 09:13:27 -0500
  • 2466594067
    Merge pull request #196 from kipmacsaigoren/zbc_optimize David Harris 2023-04-04 06:27:47 -0700
  • d7deed1690
    Merge branch 'openhwgroup:main' into zbc_optimize Kevin Kim 2023-04-03 23:45:49 -0700
  • ce8a401a84 reduced mux3 to mux2 for input signal to clmul Kevin Kim 2023-04-03 22:53:46 -0700
  • f770243689 Test File for Pull Request, Attempt to fill all four ways Noah Limpert 2023-04-03 21:54:27 -0700
  • 57ee9f3a5a Merged priv.S edits David Harris 2023-04-03 18:07:14 -0700
  • 77f071dc14 Updated imperas.ic to enable B extension David Harris 2023-04-03 17:55:30 -0700
  • 23bf8e0375
    Merge pull request #190 from SydRiley/main David Harris 2023-04-03 17:48:47 -0700
  • 43a13ff102
    Merge pull request #193 from ACWright256/main David Harris 2023-04-03 17:47:06 -0700
  • 803fee5903
    Merge branch 'openhwgroup:main' into main Alexa Wright 2023-04-03 14:30:54 -0700
  • 37f4443012
    Merge branch 'openhwgroup:main' into cachesim Limnanthes Serafini 2023-04-03 14:10:43 -0700
  • a1ce7fe321 Moved simulator into bin, added pLRU clearing Limnanthes Serafini 2023-04-03 14:10:27 -0700
  • 8cfd221444 Merge branch 'main' of https://github.com/openhwgroup/cvw into main Sydeny 2023-04-03 13:41:55 -0700
  • 91803dc684
    Merge pull request #178 from AlecVercruysse/coverage Ross Thompson 2023-04-03 14:22:46 -0500
  • af8f1ab786 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-04-03 06:13:16 -0700
  • 5fbd9d7204 parameterized upper level modules and uncore; not yet working with uncore David Harris 2023-04-03 06:11:55 -0700
  • 0799072556
    Merge pull request #189 from kipmacsaigoren/bitmanip_cleanup David Harris 2023-04-03 06:04:58 -0700
  • 7e5e9d928e Manual merge for fctrl.sv, fpu.S, and ifu.S files Sydeny 2023-04-03 01:55:23 -0700
  • 58eed1bba2 Merge branch 'main' of https://github.com/openhwgroup/cvw into main Sydeny 2023-04-03 01:54:27 -0700
  • 440e41bb3e expanded ifu coverage including 4 added directed tests and 1 exclusion, expanded fpu coverage including 6 directed tests and 2 multiline exclusions. Sydney Riley 2023-04-02 23:51:34 -0700
  • 03bf8f373f Merge branch 'bitmanip_cleanup' of https://github.com/kipmacsaigoren/cvw into bitmanip_cleanup Kevin Kim 2023-04-02 21:14:35 -0700
  • 5e7bbeddd1 removed comparator flag to ALU Kevin Kim 2023-04-02 21:14:31 -0700
  • f35b287e66 signal renaming on bitmanip alu and alu Kevin Kim 2023-04-02 18:42:41 -0700
  • d4b7da34de
    Merge pull request #177 from amaiuolo/main David Harris 2023-04-02 18:29:38 -0700
  • 9a4fa6ce96 changed signal names on clmul and zbc to match book Kevin Kim 2023-04-02 18:28:09 -0700
  • fc158fd6e5
    Merge pull request #187 from stineje/main David Harris 2023-04-02 18:27:39 -0700
  • e3f3f14216 Update one bug in testfloat - still have to fix fpdiv but others should now all work James Stine 2023-04-02 18:16:23 -0500
  • 3815b7117b Added tests for writing and reading to HPMCOUNTERM csrs Alexa Wright 2023-04-01 16:02:23 -0700
  • d8f6b9e15e paramterized wally32e passes lint and sim David Harris 2023-03-31 12:00:44 -0700
  • 193061cb3c Merge branch 'dev' into param David Harris 2023-03-31 11:30:53 -0700
  • 800fdeb7ad Added SSTC support to imperas.ic and wallyTracer. Fixes many of the privileged tests David Harris 2023-03-31 10:54:03 -0700
  • a8661d139b regression cleanup; unable to run buildroot coverage because of different config file David Harris 2023-03-31 09:59:38 -0700
  • 0ccfdde30e Regression update David Harris 2023-03-31 09:15:15 -0700
  • e5653ff351 Merged privileged test David Harris 2023-03-31 08:37:16 -0700
  • 03b4f6660c Coverage improvement: ieu, hazard, priv David Harris 2023-03-31 08:34:34 -0700
  • b95730e3a1 Coverage improvements in ieu, hazard units David Harris 2023-03-31 08:33:46 -0700
  • 820e3513c7 Privilege test improvements David Harris 2023-03-31 08:32:02 -0700
  • 37d289cf44
    Merge pull request #180 from infinitymdm/main David Harris 2023-03-31 08:31:08 -0700
  • 984d4b9918 Merge branch 'main' of https://github.com/openhwgroup/cvw Marcus Mellor 2023-03-31 10:29:10 -0500
  • a28a457099
    Merge pull request #179 from davidharrishmc/dev Mike Thompson 2023-03-31 10:56:27 -0400
  • c7ec42eaab Merge branch 'main' of https://github.com/openhwgroup/cvw Marcus Mellor 2023-03-31 09:54:02 -0500
  • 913cdecb65 Address comments in openhwgroup/cvw#180 Marcus Mellor 2023-03-31 09:51:33 -0500
  • 1cd98027de
    Merge pull request #182 from dherreravicioso/main David Harris 2023-03-31 06:32:12 -0700
  • 2b73c1d033
    Merge branch 'openhwgroup:main' into main Diego Herrera Vicioso 2023-03-31 00:35:02 -0700
  • 680f05b2d0
    Merge pull request #1 from dherreravicioso/AW_DH_privunit Diego Herrera Vicioso 2023-03-31 00:34:21 -0700
  • e8deed7811
    Merge pull request #181 from kipmacsaigoren/bitmanip_cleanup David Harris 2023-03-30 19:23:54 -0700
  • 97181e063b only pass in relevant comparator flag to ALU Kevin Kim 2023-03-30 19:15:33 -0700
  • bd1ac13f5f Merge branch 'bitmanip_cleanup' of https://github.com/kipmacsaigoren/cvw into bitmanip_cleanup Kevin Kim 2023-03-30 19:04:41 -0700
  • b43e4d8d0d
    Merge branch 'openhwgroup:main' into bitmanip_cleanup Kevin Kim 2023-03-30 19:04:36 -0700
  • d8bbb4286e Add comments to fpu.S indicating which lines of src/fpu/fctrl.sv are covered Marcus Mellor 2023-03-30 20:01:11 -0500
  • 64f15d48de Disable coverage for branches tested in fpu.s Marcus Mellor 2023-03-30 19:44:55 -0500
  • 77d5f1c81b Refactored InstrValidNotFlushed into CSR Write signals David Harris 2023-03-30 17:06:09 -0700
  • 25cd1cc432 Started factoring out InstrValidNotFlushed from CSRs David Harris 2023-03-30 14:56:19 -0700
  • a4ae1b9cbb fctrl updated and buildroot working again David Harris 2023-03-30 13:17:15 -0700