forked from Github_Repos/cvw
Minor change with the IFU in the decompress module, in the compressed instruction truth table.
The truth table is already fully covered, removed redundant last case checking
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@ -126,15 +126,15 @@ module decompress (
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InstrD = {7'b0000000, rs2p, rds1p, 3'b110, rds1p, 7'b0110011}; // c.or
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else // if (instr16[6:5] == 2'b11)
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InstrD = {7'b0000000, rs2p, rds1p, 3'b111, rds1p, 7'b0110011}; // c.and
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else if (instr16[12:10] == 3'b111 & `XLEN > 32)
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if (instr16[6:5] == 2'b00)
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else if (`XLEN > 32) //if (instr16[12:10] == 3'b111) full truth table no need to check [12:10]
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if (instr16[6:5] == 2'b00)
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InstrD = {7'b0100000, rs2p, rds1p, 3'b000, rds1p, 7'b0111011}; // c.subw
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else if (instr16[6:5] == 2'b01)
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else if (instr16[6:5] == 2'b01)
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InstrD = {7'b0000000, rs2p, rds1p, 3'b000, rds1p, 7'b0111011}; // c.addw
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else begin // reserved
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else begin // reserved
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IllegalCompInstrD = 1;
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InstrD = {16'b0, instr16}; // preserve instruction for mtval on trap
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end
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end
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// coverage off
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// are excluding this branch from coverage because in rv64gc XLEN is always 64 and thus greater than 32 bits
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// This branch will only be taken if instr16[12:10] == 3'b111 and 'XLEN !> 32, because all other
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