Xavi/cvw
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  • 0b9fd8a4b3 Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well. David Harris 2023-02-21 09:32:17 -0800
  • 73833d5576 removed incompatible rv32 tests out of arch32b tests list Kevin Kim 2023-02-20 18:05:37 -0800
  • a774cce05d
         Merge pull request #105 from ross144/main David Harris 2023-02-20 17:07:26 -0800
  • fd5c12431e Fixed typo in the global branch predictor. Ross Thompson 2023-02-20 18:48:02 -0600
  • d2e06d9ef0 Cleanup branch predictor files. Ross Thompson 2023-02-20 18:45:45 -0600
  • a14c71bd95 Renamed branch predictors and consolidated global and gshare predictors. Ross Thompson 2023-02-20 18:36:33 -0600
  • 68e39eeb66 Fixed another bug in the btb. Ross Thompson 2023-02-20 17:54:22 -0600
  • 11ecc2a5d4
         Merge pull request #104 from davidharrishmc/dev Ross Thompson 2023-02-20 17:07:40 -0600
  • 5187c78184 Fixed forwarding bug in the BTB. Ross Thompson 2023-02-20 16:18:04 -0600
  • d863f77996 added arch32b tests (giving errors in sim however) Kevin Kim 2023-02-20 14:39:34 -0800
  • d887124837 Found a bug where the d and i cache misses were not recorded in the performance counters. Ross Thompson 2023-02-20 16:00:29 -0600
  • 1982c66b72 Simiplified BTB. Ross Thompson 2023-02-20 15:39:42 -0600
  • bdcd867c11 Removed test code that broke LSU David Harris 2023-02-20 12:42:46 -0800
  • c6c21463d9 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-02-20 11:28:15 -0800
  • 081a817925
         Merge pull request #98 from ross144/main David Harris 2023-02-20 11:27:47 -0800
  • fc87425f67 touched extractArea.pl David Harris 2023-02-20 11:18:31 -0800
  • 535c7e156f touched extractArea to test commit issue David Harris 2023-02-20 11:04:33 -0800
  • 09bbf5712e
         Merge pull request #101 from MikeOpenHWGroup/contrib Ross Thompson 2023-02-20 12:54:56 -0600
  • 6c7412ba3c
         Merge pull request #99 from stineje/main Ross Thompson 2023-02-20 12:54:31 -0600
  • 00daa8aca0 Turned off SSTC_SUPPORTED in buildroot and fpga David Harris 2023-02-20 10:37:10 -0800
  • 04bb2e6746 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-02-20 10:16:53 -0800
  • 023ba68088 Extraction script updates to match new reports names David Harris 2023-02-20 10:16:45 -0800
  • 403473b79d Add SPDX header to CONTRIBUTING Mike Thompson 2023-02-20 12:11:40 -0500
  • e02f31ec04 Initial Contributing doc Mike Thompson 2023-02-20 12:05:00 -0500
  • a6b85b8e9f
         Merge pull request #100 from davidharrishmc/dev Ross Thompson 2023-02-20 10:12:49 -0600
  • df9950483e Removed unused and incomplete ROM macro instantations David Harris 2023-02-20 05:59:57 -0800
  • da6064e07f Fixed critical range to 50 ps and improved reporting in synthesis David Harris 2023-02-20 05:33:33 -0800
  • a59526fc8e Fixed IROM size parameters David Harris 2023-02-20 05:32:43 -0800
  • f8a510d5af Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-02-20 04:02:08 -0800
  • 1d3b41e0fb New expression for BTB_SIZE to avoid error during sky90 synthesis David Harris 2023-02-20 04:02:00 -0800
  • bd8497a665
         Update setup.csh David Harris 2023-02-20 03:30:08 -0800
  • f896367946 Add setup.csh for C shell users at OSU James Stine 2023-02-19 23:53:50 -0600
  • 2d417c33a4 Simplified BTB by removing the valid bit. the instruction class provides the equivalent information. Ross Thompson 2023-02-19 23:53:10 -0600
  • 100e100835 reset branch predictor after each test. Ross Thompson 2023-02-19 23:48:16 -0600
  • 0d79c0cebe Merge branch 'main' of https://github.com/openhwgroup/cvw Ross Thompson 2023-02-19 22:54:27 -0600
  • b32093b33b Simplified branch predictor. Ross Thompson 2023-02-19 22:49:48 -0600
  • ea95565306
         Merge pull request #97 from davidharrishmc/dev Ross Thompson 2023-02-19 22:23:08 -0600
  • 0ac9c9e62a Added BTB_SIZE parameter independent of BPRED_SIIZE David Harris 2023-02-19 20:13:50 -0800
  • c5090cd867 Added noAtomic feature to swweep David Harris 2023-02-19 20:05:39 -0800
  • bf5f776501 Reduced rv32imc int divider to 2 copies to avoid it being on the critical path David Harris 2023-02-19 19:59:30 -0800
  • 5b197f4f9d Parameterized btb to depend on BPRED_SIZE David Harris 2023-02-19 19:59:07 -0800
  • 8d0a600b96 Merge remote-tracking branch 'upstream/main' into main Kip Macsai-Goren 2023-02-19 16:37:18 -0800
  • 06872e3822 Adjusted DTIM to always be 512B independent of XLEN David Harris 2023-02-19 16:14:38 -0800
  • 5b8d1e4134 PMP checker size check to avoid spurious warnings David Harris 2023-02-19 16:08:23 -0800
  • 342791081a Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-02-19 15:32:40 -0800
  • ce97aa7e63 Removed orig feature from featuresweep to avoid redundancy with configsweep David Harris 2023-02-19 15:32:32 -0800
  • 636b096026 Run extractArea at end of extractSummary David Harris 2023-02-19 15:31:33 -0800
  • ac21bed64d Moved conditional instantiation outside pmpchecker David Harris 2023-02-19 15:31:00 -0800
  • 53875a9bbd New extractArea script to generate area tables David Harris 2023-02-19 15:29:41 -0800
  • 537dea156d
         Merge pull request #96 from davidharrishmc/dev Ross Thompson 2023-02-19 09:22:00 -0600
  • 7d031fcae0 Disabled W64M register for RV32 David Harris 2023-02-19 07:03:31 -0800
  • bfc9a462d5 Removed TOPO flag for synthesis; implied by tsmc28psyn David Harris 2023-02-19 07:00:16 -0800
  • 6d405ad69b Fixed RAM instantiations David Harris 2023-02-19 06:31:41 -0800
  • 2ed29792e5 Removed redundant compare in setup file David Harris 2023-02-19 06:31:26 -0800
  • 5e5dfe732d Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-02-19 05:49:35 -0800
  • fe0a893182 Renamed section 12.3 to 8.3 in MMU test definitions David Harris 2023-02-19 05:46:46 -0800
  • 9ee48637dc Possibly much better branch predictor implemention. The complexity is significantly reduced. Ross Thompson 2023-02-19 00:17:37 -0600
  • 2069d92f9e B DONE (for now) - datapath passes along comparator flag to alu - controllers and zbb handle min/max instructions Kevin Kim 2023-02-18 22:12:55 -0800
  • d44cb1febb Minor fix. Ross Thompson 2023-02-18 23:55:46 -0600
  • b3be4c621f
         Merge pull request #95 from stineje/main Ross Thompson 2023-02-18 23:36:37 -0600
  • c7720da3af Update MW reference to recognize memories properly James Stine 2023-02-18 23:30:10 -0600
  • 888f4318bc controlleres and zbb handle byte instructions Kevin Kim 2023-02-18 21:06:55 -0800
  • 27581f8d28 alu and controllers handle andn, orn, xnor Kevin Kim 2023-02-18 20:57:07 -0800
  • 43112dbc73
         Merge pull request #94 from stineje/main Ross Thompson 2023-02-18 22:52:38 -0600
  • ba968ed95e added logic to handle sign/zero extend instructions Kevin Kim 2023-02-18 20:32:40 -0800
  • 5c563bef43 fixed ctlzw bug in count unit Kevin Kim 2023-02-18 20:12:30 -0800
  • 6d60268240 zbb handles count instructions Kevin Kim 2023-02-18 20:12:17 -0800
  • 9760f0ccfd fixed bmuctrl decode bug Kevin Kim 2023-02-18 20:11:50 -0800
  • 84ddb6fb54 updated comments in bmuctrl Kevin Kim 2023-02-18 19:57:10 -0800
  • bec2905ee5 rotate instructions now handled in ZBB unit Kevin Kim 2023-02-18 19:56:54 -0800
  • e47cc222a6 removed redundant decode logic in bmuctrl Kevin Kim 2023-02-18 19:50:36 -0800
  • 9203b0cc2f began ZBB integration into ieu Kevin Kim 2023-02-18 19:44:14 -0800
  • 20880c26a4 Change mistake on linking within .synopsys file James Stine 2023-02-18 19:41:49 -0600
  • 7780cbd47a bmuctrl handles roriw Kevin Kim 2023-02-18 16:26:16 -0800
  • 883a6ca005 merge upstream synth changes Kip Macsai-Goren 2023-02-18 14:35:19 -0800
  • 6f2a2891a5
         Merge pull request #93 from davidharrishmc/dev Ross Thompson 2023-02-18 11:40:19 -0600
  • 0eda753dc4 Removed unused PredInstrClassE register from bpred David Harris 2023-02-18 05:59:25 -0800
  • 0f4226a950 Removed unused weq0M register fron fdivsqrtpostproc David Harris 2023-02-18 05:57:39 -0800
  • c5f87d7e41 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-02-18 05:34:51 -0800
  • 66e5c60fb4 Fixed issue #57 of sign selection for improperly NaN-boxed number David Harris 2023-02-18 05:34:40 -0800
  • 5986931fdc Fixed unpacking of illegal NaN box. Fixed issue #56 of sign injection NaN David Harris 2023-02-18 05:25:38 -0800
  • 980ed12c33
         Merge pull request #91 from davidharrishmc/dev Ross Thompson 2023-02-18 00:54:56 -0600
  • 92c0d3a4ed configured shifter in alu Kevin Kim 2023-02-17 21:58:49 -0800
  • 182b27dfc8 shifter bug fix - roli not passing unless I keep the MSB (instead of inverting) of truncated offset Kevin Kim 2023-02-17 21:58:26 -0800
  • c353378da8 controller supports some rotates Kevin Kim 2023-02-17 21:57:34 -0800
  • 4a52b57002 bmuctrl supports some rotates Kevin Kim 2023-02-17 21:57:19 -0800
  • dc19f8a8ec Created PostBox signal to NaN-box malformed NaNs of excess length. Fixes Issue #55 David Harris 2023-02-17 20:51:43 -0800
  • 98135f424e Fixed warnings when compiling wallyTracer David Harris 2023-02-17 20:50:43 -0800
  • 50ec6baa07 added zero extend, pre-shift mux to ALU Kevin Kim 2023-02-17 20:15:12 -0800
  • e2d90a9422 more elegant ZBA logic in controller Kevin Kim 2023-02-17 20:14:47 -0800
  • cd92d6e5d1 bmuctrl handles .uw instructions Kevin Kim 2023-02-17 20:14:13 -0800
  • 6c58048eb4 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev David Harris 2023-02-17 19:44:13 -0800
  • a194740562 Fixed RAM bugs and refactored with read taking place after clock edge rather than before. David Harris 2023-02-17 19:14:38 -0800
  • 9f3c051f8d Listed more Python files for installation David Harris 2023-02-17 19:13:52 -0800
  • 4bfff6a4eb Turned off default USE_SRAM in Makefile David Harris 2023-02-17 17:37:05 -0800
  • 750882455f controller supports ZBA instructions Kevin Kim 2023-02-17 16:44:16 -0800
  • fcae58fcc7 removed Funct7 in Execute Stage Kevin Kim 2023-02-17 16:12:09 -0800
  • 00ca715019
         Merge pull request #84 from davidharrishmc/dev Ross Thompson 2023-02-17 17:40:01 -0600
  • 9275bfb839 Memory synthesis updates David Harris 2023-02-17 15:33:49 -0800
  • 2060683770 Continue fixing memory macros for synthesis David Harris 2023-02-17 15:15:37 -0800