forked from Github_Repos/cvw
rotate instructions now handled in ZBB unit
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@ -145,7 +145,7 @@ module alu #(parameter WIDTH=32) (
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end else assign ZBCResult = 0;
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if (`ZBB_SUPPORTED) begin: zbb
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zbb #(WIDTH) ZBB(.A(A), .B(B), .W64(W64), .ZBBSelect(ZBBSelect), .ZBBResult(ZBBResult));
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zbb #(WIDTH) ZBB(.A(A), .B(B), .ALUResult(ALUResult), .W64(W64), .ZBBSelect(ZBBSelect), .ZBBResult(ZBBResult));
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end else assign ZBBResult = 0;
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// Final Result B instruction select mux
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@ -156,6 +156,7 @@ module alu #(parameter WIDTH=32) (
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4'b0001: Result = FullResult;
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4'b0010: Result = ZBCResult;
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4'b1000: Result = FullResult; // NOTE: We don't use ALUResult because ZBA instructions don't sign extend the MSB of the right-hand word.
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4'b0100: Result = ZBBResult;
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default: Result = ALUResult;
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endcase
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end else assign Result = ALUResult;
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@ -32,6 +32,7 @@
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module zbb #(parameter WIDTH=32) (
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input logic [WIDTH-1:0] A, B, // Operands
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input logic [WIDTH-1:0] ALUResult, // ALU Result
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input logic W64, // Indicates word operation
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input logic [2:0] ZBBSelect, // Indicates word operation
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output logic [WIDTH-1:0] ZBBResult); // ZBB result
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@ -57,6 +58,7 @@ module zbb #(parameter WIDTH=32) (
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//can replace with structural mux by looking at bit 4 in rs2 field
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always_comb begin
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case (ZBBSelect)
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3'b111: ZBBResult = ALUResult;
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/*15'b0010100_101_00111: ZBBResult = OrcBResult;
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15'b0110100_101_11000: ZBBResult = Rev8Result;
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15'b0110101_101_11000: ZBBResult = Rev8Result;
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