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db56a326c9
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1331 Commits

Author SHA1 Message Date
Ross Thompson
db56a326c9 renamed multimanager to multicontroller. 2022-09-14 14:03:37 -05:00
Ross Thompson
a536829824 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-14 13:59:22 -05:00
cturek
5b35473339 Added shift for radix 4 sqrt 2022-09-14 17:34:24 +00:00
cturek
9757d8ce3e Moved X-1 to preproc 2022-09-14 17:26:56 +00:00
cturek
0f5b38a6f0 Delete srt 2022-09-14 17:02:42 +00:00
cturek
8378d6b871 removed unnecessary XZero from wsmux 2022-09-14 16:59:52 +00:00
Ross Thompson
2ae62c2869 pipelining of fetch into evict AHB requests. 2022-09-13 17:51:55 -05:00
Ross Thompson
40e7d2648f Renamed signals in the LSU. 2022-09-13 11:47:39 -05:00
David Harris
f45bb25618 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-08 16:05:58 -07:00
David Harris
1688d544b9 Moved C to shift before rather than after using in an iteration 2022-09-08 16:05:53 -07:00
David Harris
1c3064af08 divsqrt comment cleanup 2022-09-08 15:40:42 -07:00
Ross Thompson
33ef158ff4 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-08 17:15:46 -05:00
David Harris
e0a9b19008 CSA-based completion detection 2022-09-08 14:58:08 -07:00
Ross Thompson
8618045bf2 Optimization. Able to remove hptw address muxes from the E stage. 2022-09-08 15:51:18 -05:00
Ross Thompson
d12ceb46b0 Oups the ahbinterface.sv was accidentally named abhinterface.sv. 2022-09-08 13:21:37 -05:00
Ross Thompson
fbea27bd69 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-07 16:36:51 -05:00
Ross Thompson
ae4a55471d Oups fixed order of ending swap with mux between cache and fetch buffer. 2022-09-07 16:29:47 -05:00
David Harris
f628622ea0 Factored out aplusbeq0 unit 2022-09-07 11:36:35 -07:00
David Harris
c2f81e309b Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-07 11:11:39 -07:00
David Harris
b0cf73d19c Running 16-bit square root cases first in testfloat 2022-09-07 11:11:35 -07:00
Ross Thompson
fd4b382ec6 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-07 12:26:50 -05:00
David Harris
e01b03e9b2 Run 16-bit fsqrt tests first 2022-09-07 10:26:09 -07:00
Ross Thompson
54c55b57cb Named change for ahb tests to be less annoying. 2022-09-07 12:24:41 -05:00
David Harris
d91b4de348 Preprocessing cleanup 2022-09-07 10:21:27 -07:00
Ross Thompson
6581490f9c Modified regression tests to add some ahb configurations. 2022-09-07 12:03:58 -05:00
David Harris
29f015810b Added rv32i config for regression of wally32periph 2022-09-07 09:37:59 -07:00
Ross Thompson
d07c44bcf6 Merge branch 'multimanager' into main 2022-09-07 10:54:27 -05:00
David Harris
29f41c6792 Continued simplifying fdivsqrt postprocessing 2022-09-07 07:02:22 -07:00
David Harris
461b9d370d Continued simplifying fdivsqrt postprocessing 2022-09-07 07:00:13 -07:00
David Harris
825d3169d9 Moving postprocessing into postproc block 2022-09-07 06:42:37 -07:00
David Harris
f40c6b0ec4 fdivsqrtfsm cleanup 2022-09-07 06:32:07 -07:00
David Harris
a0abe48ad2 fdivsqrtfsm cleanup 2022-09-07 06:27:01 -07:00
David Harris
8438546d52 Fixed regression for divsqrt radix2 2022-09-07 06:12:23 -07:00
Ross Thompson
6685b0563e James found a bug in synchronizer. Was not actually back to back flip flops. 2022-09-06 15:06:54 -05:00
Ross Thompson
99e3f55637 Added logic to make burst optional. 2022-09-06 09:21:21 -05:00
Ross Thompson
fcf72bb6ba Added generate around the longer latency version of the ram_ahb.sv 2022-09-06 09:21:03 -05:00
Ross Thompson
20842b38b9 Names changes. 2022-09-05 20:49:35 -05:00
Ross Thompson
4e7a52a7a7 Cleaned up hacks to ram. 2022-09-04 14:52:40 -05:00
Ross Thompson
9d5a7281b8 Modified ram_ahb to work with different latencies. 2022-09-04 14:46:15 -05:00
Ross Thompson
7ae58c6654 Progress towards fixing the select HREADY muxing in uncore. 2022-09-04 13:07:49 -05:00
Ross Thompson
26bfaddb25 Disabled AHB burst mode, which discovered a bug. 
Multimanger bug in how back to back requests were arbitrated.
 2022-09-03 22:31:41 -05:00
cturek
e709ad4145 Old changes to old files 2022-09-03 22:09:55 +00:00
Ross Thompson
3e540a3ca3 Possible fix to AHB burst eviction bug. If HREADY went low during a burst seq the next data phase would only last 1 cycle. 2022-09-02 19:58:41 -05:00
Ross Thompson
4115087b30 Renamed state in buscachefsm to match AHB phases. 2022-09-02 17:17:40 -05:00
Ross Thompson
472fb5e888 Renamed states in busfsm to match AHB phases and book names. 2022-09-02 17:12:36 -05:00
Ross Thompson
15a2fbdd33 Possible fix for AHB trailing ~HREADY bug. 2022-09-02 16:58:35 -05:00
Ross Thompson
851ad4417d Merge branch 'multimanager' of github.com:davidharrishmc/riscv-wally into multimanager 2022-09-02 16:31:07 -05:00
Ross Thompson
2aa5886769 Fixed brom1p1r.sv to have fpga preload. 2022-09-02 15:49:50 -05:00
Ross Thompson
722e1a029e Merge branch 'multimanager' of github.com:davidharrishmc/riscv-wally into multimanager 2022-09-02 13:54:48 -05:00
Ross Thompson
559e093ab5 Fixed up FPGA constraints. 
Added back in the fpga boot rom preload.
 2022-09-02 13:54:35 -05:00