forked from Github_Repos/cvw
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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33ef158ff4
@ -155,8 +155,8 @@ module fdivsqrtiter(
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// if starting a new divison set Q to 0 and QM to -1
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mux2 #(`DIVb+1) QMmux(QMNext[`DIVCOPIES-1], '1, DivStart, QMMux);
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flopenr #(`DIVb+1) Qreg(clk, DivStart, DivBusy, QNext[`DIVCOPIES-1], Q[0]);
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mux2 #(`DIVb+1) QMmux(QMNext[`DIVCOPIES-1], '1, DivStart, QMMux);
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flopen #(`DIVb+1) QMreg(clk, DivStart|DivBusy, QMMux, QM[0]);
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flopenr #(`DIVb+1) SMreg(clk, DivStart, DivBusy, SMNext[`DIVCOPIES-1], SM[0]);
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@ -59,7 +59,6 @@ module fdivsqrtpostproc(
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assign FZero = SqrtM ? {FirstSM[`DIVb], FirstSM, 2'b0} | {FirstK,1'b0} : {3'b1,D,{`DIVb-`DIVN+2{1'b0}}};
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csa #(`DIVb+4) fadd(WS, WC, FZero, 1'b0, WSF, WCF); // compute {WCF, WSF} = {WS + WC + FZero};
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aplusbeq0 #(`DIVb+4) wcfpluswsfeq0(WCF, WSF, wfeq0);
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// assign WZero = weq0|(wfeq0&qn[`DIVCOPIES-1]);
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assign WZero = weq0|(wfeq0 & Firstqn);
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end else begin
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assign WZero = weq0;
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@ -85,7 +85,6 @@ module fdivsqrtpreproc (
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flopen #(`NE+2) expflop(clk, DivStart, Qe, QeM);
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expcalc expcalc(.Fmt, .Xe, .Ye, .Sqrt, .XZero, .XZeroCnt, .YZeroCnt, .Qe);
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endmodule
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module expcalc(
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@ -51,6 +51,7 @@ module fdivsqrtstage4 (
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logic [`DIVb+3:0] F;
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logic [`DIVb+3:0] AddIn;
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logic [4:0] Smsbs;
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logic CarryIn;
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// Qmient Selection logic
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// Given partial remainder, select quotient of +1, 0, or -1 (qp, qz, pm)
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@ -77,7 +78,8 @@ module fdivsqrtstage4 (
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// Partial Product Generation
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// WSA, WCA = WS + WC - qD
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assign AddIn = SqrtM ? F : Dsel;
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csa #(`DIVb+4) csa(WS, WC, AddIn, |q[3:2]&~SqrtM, WSA, WCA);
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assign CarryIn = ~SqrtM & (q[3] | q[2]); // +1 for 2's complement of -D and -2D
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csa #(`DIVb+4) csa(WS, WC, AddIn, CarryIn, WSA, WCA);
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otfc4 otfc4(.q, .Q, .QM, .QNext, .QMNext);
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sotfc4 sotfc4(.s(q), .Sqrt(SqrtM), .C({1'b1, C}), .S, .SM, .SNext, .SMNext);
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